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DP83936AVUL-25 |DP83936AVUL25NSN/a480avaiFull Duplex SONIC-T Systems
DP83936AVUL-33 |DP83936AVUL33SEIKON/a472avaiFull Duplex SONIC-T Systems
DP83936AVUL-33 |DP83936AVUL33NSN/a12avaiFull Duplex SONIC-T Systems


DP83936AVUL-25 ,Full Duplex SONIC-T SystemsPIN DESCRIPTION5.5.4 Dynamically Adding TDA Descriptors3.0
DP83936AVUL-33 ,Full Duplex SONIC-T SystemsFeaturesmotherboard designs. The SONIC-T can be configured forY32-bit non-multiplexed address and d ..
DP83936AVUL-33 ,Full Duplex SONIC-T SystemsFeaturesmotherboard designs. The SONIC-T can be configured forY32-bit non-multiplexed address and d ..
DP83950BNU ,RIC⑩ Repeater Interface ControllerFeatures 7.0PORT LOGIC FUNCTIONSYCompliant with the IEEE 802.3 Repeater Specification8.0RIC REGISTE ..
DP83950BVQB ,RIC⑩ Repeater Interface ControllerFUNCTIONAL DESCRIPTIONagement Interface is available for the collection of data inManaged Hub
DP83950BVQB ,RIC⑩ Repeater Interface ControllerDP83950BRICRepeaterInterfaceControllerOctober1995TMDP83950BRICRepeaterInterfaceControllerYSeparate ..
DS90C387 ,Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGAFeaturesn Complies with OpenLDI specification for digital displayThe DS90C387/DS90CF388 transmitter ..
DS90C387AVJD ,Dual Pixel LVDS Display Interface / FPD-Link TransmitterFeaturessecond).n Supports SVGA through QXGA panel resolutionsThe LDI chipset is improved over prio ..
DS90C387AVJD NOPB ,Dual Pixel LVDS Display Interface / FPD-Link Transmitter 100-TQFP -10 to 70Maximum Ratings (Note 1) Package Derating:DS90C387 A 18.2mW/˚C above +25˚CIf Military/Aerospace spe ..
DS90C387AVJD/NOPB ,Dual Pixel LVDS Display Interface / FPD-Link Transmitter 100-TQFP -10 to 70General DescriptionThe DS90C387A/DS90CF388A transmitter/receiver pair is vides a reliable interface ..
DS90C387RVJD ,85MHz Dual 12-Bit Double Pumped Input LDI Transmitter VGA/UXGAFeaturessignalsinthelowswingoperation.Eachinputdatawidthwillbe1/2ofclockcycle.Withaninputclockat85M ..
DS90C387VJD ,+3.3V Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGAElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..


DP83936AVUL-25-DP83936AVUL-33
Full Duplex SONIC-T Systems
TL/F/12597
DP83936AVUL-20/25/33
MHz
Full
Duplex
SONIC-T
Systems-Oriented
Network
Interface
Controller
with
Twisted
Pair
Interface
January 1996
DP83936AVUL-20/25/33 MHz Full Duplex SONICTM -T
Systems-Oriented Network Interface Controller
with Twisted Pair Interface
General Description
The SONIC-T (Systems-Oriented Network Interface Control-
ler with Twisted Pair)isa second-generation Ethernet Con-
troller designedto meetthe demandsof today’s high-speed
32-and 16-bit systems.Its system interface operates witha
high speed DMAthat typically consumes less than5%of
thebus bandwidth. Selectablebus modes provide bothbig
and little endian byte orderinganda clean interfaceto stan-
dard microprocessors. The linked-list buffer management
systemof SONIC-T offers maximum flexibilityina varietyof
environments from PC-oriented adaptersto high-speed
motherboard designs.The SONIC-Tcanbe configuredfor
full duplex operation. Furthermore,the SONIC-T integrates fully-compatible IEEE 802.3 Encoder/Decoder (ENDEC)
anda TwistedPair Interface which providea one-chip solu-
tionfor Ethernet when using 10BASE-T. When using
10BASE2or 10BASE5,the SONIC-T maybe paired withthe
DP8392 Coaxial Transceiver Interfaceto achievea simple
2-chip solution.
For increased performance,the SONIC-T implementsa
unique buffer management schemeto efficiently process
receiveand transmit packetsin system memory.No inter-
mediate packet copyis necessary.The receive buffer man-
agement uses three areasin memoryfor(1) allocating addi-
tional resources,(2) indicating status information, and(3)
buffering packet data.During reception,the SONIC-T stores
packetsinthe buffer area, then indicates receive statusand
control informationinthe descriptor area.The system allo-
cates more memory resourcestothe SONIC-Tby adding
descriptorstothe memory resource area.The transmit buff- management usestwo areasin memory: indicating statusand control information; fetching packet data.
The system can createa transmit queue allowing multiple
packetstobe transmitted froma single transmit command.
The packet datacan resideonany arbitrary byte boundary
andcan existin several non-contiguous locations.
Features 32-bit non-multiplexed addressand databus ConfigurableforFull Duplex operation Auto AUI/TPI selection High-speed interruptible DMA Linked-list buffer management maximizes flexibility Two independent 32-byte transmitand receive FIFOs Bus compatibilityforall standard microprocessors Supportsbigand little endian formats Integrated IEEE 802.3 ENDEC Integrated TwistedPair Interface Complete address filteringforupto16 physical and/or
multicast addresses 32-bit general-purpose timer Loopback diagnostics Fabricatedin low-power CMOS 160 PQFP package Full network management facilities supportthe 802.3
layer management standard Integrated supportfor bridgeand repeater applications
System Diagram
IEEE 802.3 Ethernet/Thin-Ethernet/10BaseT Station
TL/F/12597–1
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
SONICTM isatrademark ofNationalSemiconductor Corporation.
C1996National SemiconductorCorporation RRD-B30M36/Printed inU.S.A. http://
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