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DP8391NSN/a6avaiSerial Network Interface


DP8391 ,Serial Network InterfaceFeaturesYCompatible with Ethernet II, IEEE 802.3 10base5 andThe DP8391 Serial Network Interface (SN ..
DP83910AN ,CMOS SNI Serial Network InterfaceFeaturesercable.Whentransmitting,theSNIconvertsnon-return-to-YCompatible with Ethernet I, IEEE 802. ..
DP83910AV ,CMOS SNI Serial Network InterfaceFeaturesercable.Whentransmitting,theSNIconvertsnon-return-to-YCompatible with Ethernet I, IEEE 802. ..
DP83910AV ,CMOS SNI Serial Network InterfaceDP83910ACMOSSNISerialNetworkInterfaceMay1995DP83910ACMOSSNISerialNetworkInterfaceGeneralDescription ..
DP83916VF ,SONIC-16 Systems-Oriented Network Interface Controller [Life-time buy]Pin Description2.3 Source Address 5.3 System Configuration2.4 Length/Type Field 5.4 Bus Operations2 ..
DP8391AN ,SNI Serial Network InterfaceFunctional Descriptionbelow.TheothertwochipsaretheDP8392CoaxTransceiv-3.1 Oscillatorer Interface (C ..
DS90C241IVSX/NOPB ,5-35MHz DC- Balanced 24-Bit FPD-Link II Serializer 48-TQFP -40 to 105Features 2 Applications1• 5-MHz to 35-MHz Clock Embedded and DC- • Automotive Central Information D ..
DS90C241QVSX , 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
DS90C2501SLB ,+2.5V 162 MHz Dual DVO Port LDI Transmitter with built-in scalerFeaturesn Complies with Open LDI and GMCH DVO specificationThe DS90C2501 is a highly integrated sca ..
DS90C3201VS ,3.3V 8 MHz to 135 MHz Dual FPD-Link TransmitterFunctional Descriptionmode,bothDOX[A-E]andDOY[A-E]LVDSportsforoddandThe DS90C3201 and DS90C3202 are ..
DS90C363AMTD ,+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkFeaturesn 20 to 65 MHz shift clock supportThe DS90C363A/DS90CF363A transmitter converts 21 bitsofCM ..
DS90C363AMTDX ,+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..


DP8391
Serial Network Interface
TL/F/6758
DP8391/NS32491
Serial
Network
Interface
July 1986
DP8391/NS32491 Serial Network Interface
General Description
The DP8391 Serial Network Interface (SNI) providesthe
Manchester data encoding and decoding functionsfor
IEEE 802.3 Ethernet/Cheapernet type local area networks.
TheSNI interfacesthe DP8390 Network Interface Controller
(NIC)tothe Ethernet transceiver cable. When transmitting,
the SNI converts non-return-to-zero (NRZ) data fromthe
controller and clock pulsesinto Manchester encodingand
sendsthe converted data differentiallytothe transceiver.
The opposite process occursonthe receive path, wherea
digital phase-locked loopdecodes10 Mbit/s signalswithas
muchas g20nsof jitter.
The DP8391SNIisa functionally complete Manchesteren-
coder/decoder including ECLlike balanced driver andre-
ceivers,on board crystal oscillator, collision signal transla-
tor,anda diagnostic loopback circuit.
TheSNIis partofa three chipsetthat implementsthe com-
plete IEEE compatible network node electronicsas shown
below.The othertwo chipsare theDP8392 Coax Transceiv- Interface (CTI)andthe DP8390 Network Interface Con-
troller (NIC).
IncorporatedintotheCTIarethe transceiver, collisionand
jabber functions.The Media Access Protocolandthe buffer
management tasksare performedbythe NIC. Thereisan
isolation requirementon signaland power lines betweenthe
CTI andthe SNI. Thisis usually accomplishedby usingaset miniaturepulse transformersthat comeina 16-pin plastic
DIPfor signal lines. Power isolation, however,is doneby
usingaDCtoDC converter.
Features Compatible with EthernetII, IEEE 802.3 10base5 and
10base2 (Cheapernet)10 Mb/s Manchester encoding/decoding with receive
clock recovery Patented digital phase locked loop (DPLL) decoderre-
quiresno precision external components Decodes Manchester data withupto g20nsof jitter Loopback capabilityfor diagnostics Externally selectable halforfull step modesof opera-
tionat transmit output Squelch circuitsatthe receive and collision inputsre-
ject noise High voltage protectionat transceiver interface (16V) TTL/MOS compatible controller interface Connects directlytothe transceiver (AUI) cable
Tableof Contents
1.0 System Diagram
2.0 Block Diagram
3.0 Functional Description
3.1 Oscillator
3.2 Encoder
3.3 Decoder
3.4 Collision Translator
3.5 Loopback
4.0 Connection Digram
5.0Pin Description
6.0 Absolute Maximum Ratings
7.0 Electrical Characteristics
8.0 Switching Characteristics
9.0 Timingand Load Diagrams
10.0 Physical Dimensions
1.0 System Diagram
IEEE802.3 CompatibleEthernet/CheapernetLocalArea Network ChipSet
TL/F/6758–1
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
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