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DM74S573ANNSN/a120avai45 ns, (1024 x 4) 4096-bit TTL PROM
DM74S573JNSN/a51avai60 ns, (1024 x 4) 4096-bit TTL PROM
DM74S573NNSN/a120avai60 ns, (1024 x 4) 4096-bit TTL PROM
DM74S573NNSCN/a12avai60 ns, (1024 x 4) 4096-bit TTL PROM


DM74S573AN ,45 ns, (1024 x 4) 4096-bit TTL PROMGeneral Description This Schottky memory is organized in the popular 1024 words by 4 bits confi ..
DM74S573J ,60 ns, (1024 x 4) 4096-bit TTL PROMGeneral Description This Schottky memory is organized in the popular 1024 words by 4 bits confi ..
DM74S573N ,60 ns, (1024 x 4) 4096-bit TTL PROMFeatures I Advanced titanium-tungsten (T i-W) fuses I Schottky-clamped for high speed Addres ..
DM74S573N ,60 ns, (1024 x 4) 4096-bit TTL PROMBlock Diagram WIT ARMY M x M MEMORY MATRIX KGODER W5 03 il? m a Pin Names A0-A9 Ad ..
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DM74S573AN-DM74S573J-DM74S573N
60 ns, (1024 x 4) 4096-bit TTL PROM
DM54SS73IDM748573
National
Semiconductor
DM54/74S573
(1024 x 4) 4096-Bit TTL PROM
General Description
This Schottky memory is organized in the popular 1024
words by 4 bits configuration. Memory enable inputs are
provided to control the output states. When the device is
enabled, the outputs represent the contents of the selected
word. When disabled, the 4 outputs go to the "OFF" or high
impedance state.
PROMs are shipped from the factory with lows in all loca-
tions. A high may be programmed into any selected location
by following the programming instructions.
Features
I: Advanced titanium-tungsten (T i-W) fuses
ll Schottky-clamped for high speed
Address access-down to 35 ns max
Enable access--25 ns max
Enable recovery-25 ns max
" PNP inputs for reduced input loading
II All DC and AC parameters guaranteed over
temperature
I: Low voltage TRl-SAFETM programming
I! TRl-STATE® Outputs
Block Diagram
'ic: J, 4 "'dl gm
M - Miuunv MATRIX
necoom T l!
23 1 1 - 1 I
M [ lt H 16 - ft! ih
M mux uux mux mux
- -r - _ -
2- BUF BUF Bur Eur
mate I l r I
tatt 03 ill m an
Pin Names .
A0-A9 Addresses
ttl-ttt Output Enables
G ND Ground
tM-tN Outputs
Vcc Power Supply
TU/D/9193-1
Connection Diagrams
DuaI-ln-Llne Package
wonwmmémnd
tmo- 10
gt) -vcc
19 -A8
11r-04
Top View
TL/D/9198-2
Order Number
DM54/74S573J, 573Ad, 5738.1
DM748573N, 573AN, 573BN
See NS Package Number J18A or MBA
Ordering Information
Plastic Leaded Chip Carrier (PLCC)
N - Ct 8 no
_ A _ ' _
II III
32 12019
13-4 18-A?
A4--5 17-h6
OO-ti lti-A5
(ll-? 15-t-;
m-a 14-07
$10111213
II III
'0 ca V m to
O z 0 O CT
Top View
Order Number
DM745573V, 573AV, 573B1t
See NS Package Number V20A
Commercial Temp Range (0°C to + 70''C)
Parameter/Order Number
Max Access Time (ns)
DM74S573AJ 45
DM74S573BJ 35
DM74S573J 60
DM74S573AN 45
DM74S573BN 35
DM74S573N 60
DM74S573AV 45
DM74S573BV 35
DM748573V 60
Military Temp Range (-55''C to + 125°C)
Parameter/Order Number
Max Access Time (ns)
DM54S573AJ 60
DM548573 BJ 50
DM54S573J 75
TU/D/g193-3
SLSS’PLWG/SASSVSWG
DM543573/DM74S573
Absolute Maximum Ratings (Note1)
Operating Conditions
It Mllltary/Aerospace specified devlces are required, Min Max Unlts
please contact the Natlonal Semiconductor Sales Supply Voltage (Vcc)
Otfltte/DiMrlbutora for availability and trpetMttations. Military 4.50 5.50 V
Supply Voltage (Note 2) -0.5V to + 7.0V Commercial 4.75 5.25 V
Input Voltage (Note 2) - 1 .2V to + 5.5V Awrnt Temperature (TA) 55 5 C
_ i itary - + 12 '
ted V10ltage (Ntote 2) 55%? 1:41-5:52 Commercial 0 + 70 "C
L 03:9 emgerle; T' 10 d to 300''C Logical "ty' Input Voltage 0 0.8 V
ea emp' ( t) f""' . sew” s) _ Logical"1"lnputVoltage 2.0 5.5 V
Note P. Absolute maximum ratings are those values beyond which the de-
vice may be permanently damaged. They do not mean that the device may
be operated at these values.
Note 2: These limits do not apply during programming. For the programming
ratings, refer to the programming instructions.
DC Electrical Characteristics (Note1)
Symbol Parameter Conditions DM54S573 DM74S573 Units
Min Typ Max Min Typ Max
IIL Input Load Current Vcc = Max, Vm = 0.45V -80 -250 -80 --250 WA
IIH Input Leakage Current Vcc = Max, VlN = 2.7V 25 25 pA
Vcc = Max,V1N = 5.5V 1.0 1.0 mA
VOL Low Level OutputVoltage Vcc = Min, IOL = 16 mA 0.35 0.50 0.35 0.45 V
" Low Level Input Voltage 0.80 0.80 V
VIH High Level Input Voltage 2.0 2.0 V
" Input Clamp Voltage Vcc = Min, IN = -18 mA -0.8 -1.2 -0.8 - 1.2 V
th lnputCapacitance vcc = 5.0V, v.N = 2.0V -
TA = 25''C,1 MHz 4 4 0 pF
Co Output Capacitance Vcc = 5.0V, Vo = 2.0V 6.0 6.0 pF
TA = 25''C, 1 MHz, Outputs Off
'00 Power Supply Current Vcc = Max, Input Grounded 100 140 100 140 m A
All Outputs Open
log Short Circuit vo = 0V, VCC = Max _ - _ _
Output Current (Note 2) 20 70 20 70 mA
loz Output Leakage Vcc = Max, Vo = 0.45V to 2.4V +50 + 50 ”A
(TRI-STATE) Chip Disabled _ 50 - 50 p. A
VOH Output Voltage High 'OH == -2.0 mA 2.4 3.2 V
lore = - 6.5 mA 2.4 3.2 V
Note 1: These limits apply over the entire operating range unless stated otherwise. All typical values are for Vcc = 5.0V and TA = 25''C,
Note 2: During log measurement. only one output at a time should be grounded. Permanent damage may otherwise result.
AC Electrical Characteristics with Standard Load and Operating Conditions
COMMERCIAL TEMP RANGE (0°C to + 70°C)
Symbol ie,',S Parameter DM74SS73 DM74S573A DM74S573B Units
yrnbol Min Typ Max Min Typ Max Mln Typ Max
TAA TAVQV Address Access Time 40 60 25 45 25 35 ns
TEA TEVQV Enable Access Time 20 35 15 25 15 25 ns
TER TEXQX Enable Recovery Time 20 35 15 25 15 25 ns
TZX TEVQX Output Enable Time 20 35 15 25 15 25 ns
TXZ TEXQZ Output Disable Time 20 35 15 25 15 25 ns
MILITARY TEMP RANGE (- 55''C to + 125°C)
Symbol gets, Parameter DM548573 DM54SS73A DM54S573B Units
Mln Typ Max Min Typ Max Min Typ Max
TAA TAVQV Address Access Time 40 75 25 60 25 50 ns
TEA TEVQV Enable Access Time 20 45 15 35 15 35 ns
TER TEXQX Enable Recovery Time 20 45 15 35 15 35 ns
TZX TEVQX Output Enable Time 20 45 15 35 15 35 ns
TXZ TEXQZ Output Disable Time 20 45 15 35 15 35 ns
Functional Description
TESTABILITY
The Schottky PROM die includes extra rows and columns of
fusable links for testing the programmability of each chip.
These test fuses are placed at the worst-case chip locations
to provide the highest possible confidence in the program-
ming tests in the final product. A ROM pattern is also per-
manently fixed in the additional circuitry and coded to pro-
vide a parity check of input address levels. These and other
test circuits are used to test for correct operation of the row
and column-select circuits and functionality of input and en-
able gates. All test circuits are available at both wafer and
assembled device levels to allow 100% functional and para-
metric testing at every stage of the test flow.
RELIABILITY
As with all National products, the Ti-W PROMs are subject-
ed to an on-going reliability evaluation by the Reliability As-
surance Department. These evaluations employ accelerate
ed lite tests, including dynamic high-temperature operating
life, temperature-humidity lite, temperature cycling, and ther-
mal shock. To date, nearly 7.4 million Schottky Ti-W PROM
device hours have been logged, with samples in Epoxy B
molded DIP (N-package), PLCC (V-package) and CERDIP
(J-package). Device performance in all package confgura-
tions is excellent.
TlTANIUM-TUNGSTEN FUSES
National's Programmable Read-Only Memories (PROMs)
feature titanium-tungsten (Ti-W) fuse links designed to pro-
gram efficiently with only 10.5V applied. The high pertorm-
ance and reliability of these PROMs are the result of fabrica-
tion by a Schottky bipolar process, of which the titanium-
tungsten metallization is an integral part, and the use of an
on-chip programming circuit.
A major advantage of the titanium-tungsten fuse technology
is the low programming voltage of the fuse links. At 10.5V,
this virtually eliminates the need for guard-ring devices and
wide spacings required for other fuse technologies. Care is
taken, however, to minimize voltage drops across the die
and to reduce parasites The device is designed to ensure
that worst-case fuse operating current is low enough for
reliable Iong-term operation. The Darlington programming
circuit is liberally designed to insure adequate power density
for blowing the fuse links. The complete circuit design is
optimized to provide high performance over the entire oper-
ating ranges of Vcc and temperature.
SLSSVLWG/SLSSVSWCI
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM54S573AJ - product/dm54s573aj?HQS=TI-null-nulI-dscatalog-df-pf—nuII-wwe
DM74S573BV - product/dm743573bv?HQS=T|-null-nulI-dscatalog-df-pf-nuII-wwe
DM74S573V - product/dm74s573v?HQS=T|-nu|I-nuIl-dscatalog-df-pf-nulI-wwe
DM74S573N - product/dm743573n?HQS=T|-nuII-nulI-dscatalog-df—pf—nuII-wwe
DM74S573BN - product/dm74s573bn?HQS=T|-nu|l-nu|l-dscatalog-df-pf—nuII-wwe
DM54S573BJ - productldm543573bj?HQS=T|—nul|-null-dscatalog-df—pf—nuII-wwe
DM74S573J - product/dm748573j?HQS=T|—nu|I-nulI-dscatalog-df—pf—nuII-wwe
DM54S573J - product/dm543573j?HQS=T|-nu|I-nulI—dscatalog-df—pf—nuII-wwe
DM74S573AJ - product/dm743573aj?HQS=TI-nul|-null-dscatalog-df-pf-null-wwe
DM74S573AN - product/dm743573an?HQS=T|-nu|I-nu|I-dscatalog-df—pf—nuII-wwe
DM74S573AV - product/dm74s573av?HQS=TI-null-nulI-dscatalog-df-pf-nuIl-wwe
DM74S573BJ - product/dm74s573bj?HQS=T|—nuII-nulI-dscatalog-df—pf—nuII-wwe
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