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DM74LS221NFAIN/a52avai Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs
DM74LS221SJXFAIN/a1902avai Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs


DM74LS221SJX , Dual Non-Retriggerable One-Shot with Clear and Complementary OutputsDM74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary OutputsAugust 1986Revised Ap ..
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DM74LS221N-DM74LS221SJX
Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs
DM74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs August 1986 Revised April 2000 DM74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs General Description Features The DM74LS221 is a dual monostable multivibrator withA dual, highly stable one-shot Schmitt-trigger input. Each device has three inputs permit-Compensated for V and temperature variations CC ting the choice of either leading-edge or trailing-edge trig- Pin-out identical to DM74LS123 (Note 1) gering. Pin (A) is an active-LOW trigger transition input and Output pulse width range from 30 ns to 70 seconds pin (B) is an active-HIGH transition Schmitt-trigger input that allows jitter free triggering for inputs with transitionHysteresis provided at (B) input for added noise rates as slow as 1 volt/second. This provides the input with immunity excellent noise immunity. Additionally an internal latching Direct reset terminates output pulse circuit at the input stage also provides a high immunity to Triggerable from CLEAR input V noise. The clear (CLR) input can terminate the output CC DTL, TTL compatible pulse at a predetermined time independent of the timing Input clamp diodes components. This (CLR) input also serves as a trigger input when it is pulsed with a low level pulse transition (). To obtain the best and trouble free operation from this device please read operating rules as well as the Fair- Note 1: The pin-out is identical to DM74LS123 but, functionally it is not; child Semiconductor one-shot application notes carefully refer to Operating Rules #10 in this datasheet. and observe recommendations. Ordering Code: Order Number Package Number Package Description DM74LS221M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS221SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS221N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Inputs Outputs CLEAR A B Q Q LX X L H XH X L H XX L L H HL ↑ H ↓ H ↑ (Note 2) L H H = HIGH Logic Level L = LOW Logic Level X = Can Be Either LOW or HIGH ↑ = Positive Going Transition ↓ = Negative Going Transition = A Positive Pulse = A Negative Pulse Note 2: This mode of triggering requires first the B input be set from a LOW-to-HIGH level while the CLEAR input is maintained at logic LOW level. Then with the B input at logic HIGH level, the CLEAR input whose positive transition from LOW-to-HIGH will trigger an output pulse. © 2000 DS006409
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