DM74154N ,4-Line to 16-Line Decoders/DemultiplexersFeaturesYDecodes 4 binary-coded inputs into one of 16 mutuallyEach or these 4-line-to-16-line decod ..
DM74155N ,V(cc): 7V; V(in): 5.5V; dual 2-line to 4-line decoder / demultiplexerDM54155/DM74155Dual2-Lineto4-LineDecoders/DemultiplexersFebruary1993DM54155/DM74155Dual2-Lineto4-Li ..
DM74157N ,Quad 2-Line to 1-Line Data Selectors/MultiplexersFeaturesYBuffered inputs and outputsThese data selectors/multiplexers contain inverters andYdrivers ..
DM7416 ,Hex Inverting Buffers with High Voltage Open-Collector OutputsDM5416/DM7416HexInvertingBufferswithHighVoltageOpen-CollectorOutputsJune1989DM5416/DM7416HexInverti ..
DM74161AN ,7 V, synchronous 4-bit counterapplications without additional
gating. Instrumental in accomplishing this function are two
count ..
DM74161N ,Synchronous 4-Bit Countersapplications without additionalincident with each other when so instructed by the count-gating. Ins ..
DS1743P+100 ,Y2KC nonvolatile timekeeping RAM, 100nsPIN DESCRIPTION-70 70 ns accessA0-A12 - Address Input-100 100 ns accessCE - Chip Enableblank 28-pin ..
DS1743P-100 ,Y2KC nonvolatile timekeeping RAM, 100nsFEATURES PIN ASSIGNMENT Integrated NV SRAM, real time clock, crystal, power-fail control circuit a ..
DS1743P-100 ,Y2KC nonvolatile timekeeping RAM, 100nsPIN DESCRIPTION-70 70 ns accessA0-A12 - Address Input-100 100 ns accessCE - Chip Enableblank 28-pin ..
DS1743P-100 ,Y2KC nonvolatile timekeeping RAM, 100nsPIN DESCRIPTION-70 70 ns accessA0-A12 - Address Input-100 100 ns accessCE - Chip Enableblank 28-pin ..
DS1743P-100+ ,Y2K-Compliant, Nonvolatile Timekeeping RAMsPIN DESCRIPTION PIN PIN NAME FUNCTION NAME FUNCTION PDIP PowerCap PDIP PowerCap 1, 2, 3, Chip Enabl ..
DS1743W-120 ,Y2K-Compliant, Nonvolatile Timekeeping RAMsPIN DESCRIPTION PIN PIN NAME FUNCTION NAME FUNCTION PDIP PowerCap PDIP PowerCap 1, 2, 3, Chip Enabl ..
DM74154N
4-Line to 16-Line Decoders/Demultiplexers
TL/F/6548
54154/DM54154/DM74154
4-Line
16-Line
Decoders/Demultiplexers
June 1989
54154/DM54154/DM74154
4-Line to 16-Line Decoders/Demultiplexers
General Description
Eachor these 4-line-to-16-line decoders utilizes TTL circuit-to decode four binary-coded inputsinto oneof sixteen
mutually exclusive outputs when boththe strobe inputs,G1
andG2,are low. The demultiplexing functionis performed usingthe4 inputlinesto addressthe output line, passing
data from oneofthe strobe inputs withthe other strobe
input low. When either strobe inputis high,all outputsare
high. These demultiplexersare ideally suitedfor implement-
ing high-performance memory decoders.All inputsare buff-
ered and input clamping diodesare providedto minimize
transmission-line effects and thereby simplify systemde-
sign.
Features Decodes4 binary-coded inputsinto oneof16 mutually
exclusive outputs Performsthe demultiplexing functionby distributing data
fromone inputlinetoanyoneof16 outputs Input clamping diodes simplify system design High fan-out, low-impedance, totem-pole outputs Typical propagation delay levelsof logic19ns
Strobe18ns Typical power dissipation 170mW Alternate Military/Aerospace device (54154)is avail-
able. Contacta National Semiconductor Sales Office/
Distributorfor specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6548–1
Order Number 54154DMQB,54154FMQB, DM54154J orDM74154N
SeeNS Package Number J24A,N24Aor W24C
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
