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DM54S287AJNSN/a10avai40 ns, (256 x 4) 1024-bit TTL PROM
DM54S287JNS?N/a5avai60 ns, (256 x 4) 1024-bit TTL PROM
DM74S287ANNSN/a90avai30 ns, (256 x 4) 1024-bit TTL PROM
DM74S287NNSCN/a4avai50 ns, (256 x 4) 1024-bit TTL PROM


DM74S287AN ,30 ns, (256 x 4) 1024-bit TTL PROMGeneral Description This Schottky memory is organized in the popular 256 words by 4 bits config ..
DM74S287N ,50 ns, (256 x 4) 1024-bit TTL PROMGeneral Description This Schottky memory is organized in the popular 256 words by 4 bits config ..
DM74S288AN ,256-BIT TTL PROMFeatures This Schottky memory is organized in the popular 32 words I Advanced titanium-tungsten ..
DM74S288AV ,256-BIT TTL PROMFeatures This Schottky memory is organized in the popular 32 words I Advanced titanium-tungsten ..
DM74S288J ,256-BIT TTL PROMDM74S288 aNational Semiconductor DM74S288 (32 x 8) 256-Bit TTL PROM
DM74S288N ,256-BIT TTL PROMBlock Diagram M M 256w mm h? 32 x il AI memo" mmx E#h8tt __,e-i,',eyce-r,e-i,j,ijj,,ij,e ..
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DM54S287AJ-DM54S287J-DM74S287AN-DM74S287N
40 ns, (256 x 4) 1024-bit TTL PROM
DM54S287/DM748287
National
Semiconductor
DM54/74S287
(256 x 4) 1024-Bit TTL PROM
General Description
This Schottky memory is organized in the popular 256
words by 4 bits configuration. Memory enable inputs are
provided to control the output states. When the device is
enabled, the outputs represent the contents of the selected
word. When disabled, the 4 outputs go to the "OFF" or high
impedance state.
PROMs are shipped from the factory with lows in all loca-
tions. A high may be programmed into any selected location
by following the programming instructions.
Features
a Advanced titanium-tungsten (T i-W) fuses
a Schottky-clamped for high speed
Address attttess--down to 30 ns max
Enable atxtess-20 ns max
Enable recovery--20 ns max
I: PNP inputs for reduced input loading
I: All DC and AC parameters guaranteed over
ttt m perature
a Low voltage TRl-SAFETM programming
>2000V input protection for electrostatic discharge
ll TRI-STATEO outputs
Block Diagram
Ali 10mm ARHAV
J, 32 x 32
32 MEMORY mrmx
DECODER
ENABLE
GATE ou
Pln Names
AO-A? Addresses
G1, tttt Output Enables
GND Ground
t20-Q3 Outputs
Vcc Power Supply
TLfW8359-1
Connection Diagrams
Dual-tn-Line-Package
M 2, V 19 Ag;
ss-?. En
M 2, y. 2
" L 2 M
Al .1 2 III
" l. 2 02
sun JI. ' 03
TL/D/8359-2
Top Vlew
Order Number DM54/748287J, 287Ad,
DM743287N or 287AN
See NS Package Number J16A or N16A
Ordering Information
Plastic Leaded Chlp Carrier (PLCC)
2 "2 2 >8:
I I l I I
3 2 1 2019
A4-4 18-.tT2
A3-5 17-tTt
A0-6 16-00
AI-7 15-NC
h2-8 " -01
9 10111213
I l I l I
2 t 2 p, S
TopVIew
Order Number DM748287V or 287AV
See NS Package Number V20A
Ctttttrnerttlttl Temp Range (trc to + 7tt'C)
Parameter/Order Number Max Access Time (ns)
DM748287AJ 30
DM74S287J 50
DM748287AN 30
DM74S287N 50
DM748287AV 30
DM74S287V 50
Mllltary Temp Range (
-55'C to + 125°C)
Parameter/Order Number Max Access Time (ns)
DM54S287AJ 40
DM548287J 60
TL/D/8359-7
iBZSVLWGILBZSPSING
DM548287IDM748287
Absolute Maximum Ratings (Note1)
Operating Conditions
If Military/Aerospace specified devices are required, Mln Max Units
please contact the National Semiconductor Sales Supply Voltage (Vcc)
Offlce/Distributors for availability and specifications. Military 4.50 5.50 V
Supply Voltage (Note 2) - 0.5 to + 7.0V Commercial 4.75 5.25 V
Input Voltage (Note 2) - 1.2V to + 5.5V "tll:) Temperature (TA) 55 125 C
_ I i ary - + q
(SDUtput Ile,': (Ntote 2) 632V to+-: :05: Commercial 0 70 " C
Ltorjlge emger': T' 1 d to 300°C Logical "o" Input Voltage 0 0.8 V
ea emp. ( o enng, 0 secon s) Logical "I Ir Input Voltage 2.0 5.5 V
ESD > 2000V
DC Electrical Characteristics (Note 3)
Symbol Parameter Conditions DM54S287 DM74S287 Unlts
Min Typ Max Min Typ Max
IlL Input Load Current Vcc = Max, VIN = 0.45V -80 -250 . -80 _ 250 p.A
IIH Input Leakage Current Vcc= Max, VIN = 2.7V 25 25 p.A
Vcc=Max, VIN=5.5V 1.0 1.0 mA
VOL Low Level Output Voltage Vac: Min, lor. = 16 mA 0.35 0.50 0.35 0.45 V
" (Note 4) Low Level Input Voltage 0.80 0.80 V
VIH (Note 4) High Level Input Voltage 2.0 2.0 V
Vc Input Clamp Voltage VCC= Min, IN = - 18 mA -0.8 - 1.2 - 0.8 -1.2 V
C. Input Capacitance VCC = 5.0V, VIN = 2.0V
TA = 25''C, 1 MHz 4.0 4.0 pF
Co Output Capacitance VCC= 5.0V, V0 = 2.0V 6.0 6.0 . pF
TA = 25''C, 1 MHz, Outputs Off "
'00 Power Supply Current Vcc = Max, Inputs Grounded 80 130 80 130 m A
All Outputs Open
log Short Circuit V0 = OV, Vcc = Max _ _ _ _
Output Current (Note 5) 20 7O 20 70 mA
'02 Output Leakage Vcc = Max, Vo = 0.45V to 2.4V + 50 + 50 pA
(TRI-STATE) Chip Disabled _ 50 - 50 " A
VOH Output Voltage High lou-- -2.0 mA 2.4 3.2 V
10H = - 6.5 mA 2.4 3.2 V
Note 1: Absolute maximum ratings are those values beyond which the device may be permanently damaged. They do not mean that the device may be operated at
these values.
Note 2: These limits do not apply during programming. For the programming ratings, refer to the programming instructions.
Note 3: These limits apply over the entire operating range unless stated otherwise. All typical values are for VCC = 5.0V and TA = +25°C.
Note 4: These are absolute voltages with respect to pin 8 on the device and include all overshoots due to system andlor tester noise. Do not attempt to test these
values without suitable equipment.
Note 5: During los measurement, only one output at a time should be grounded. Permanent damage may otherwise result.
AC Electrical Characteristics with Standard Load and Operating Conditions
COMMERCIAL TEMP RANGE (0°C to + 70''C)
DM748287 DM748287A
Symbol JEDEC Symbol Parameter Units
Mln Typ Max Min Typ Max
TAA TAVQV Address Access Time 35 50 20 30 ns
TEA TEVQV Enable Access Time 15 25 15 20 ns
TER TEXQX Enable Recovery Time 15 25 15 20 ns
TZX TEVQX Output Enable Time 15 25 15 20 ns
TXZ TEXQZ Output Disable Time 1 5 25 1 5 20 ns
MILITARY TEMP RANGE (- 55'C to + 125''C)
DM543287 DM54S287A
Symbol JEDEC Symbol Parameter Units
Mln Typ Max Mln Typ Max
TAA TAVQV Address Access Time 35 60 20 40 ns
TEA TEVQV Enable Access Time 15 30 15 30 ns
TER TEXQX Enable Recovery Time 15 30 15 30 ns
TZX TEVQX Output Enable Time 15 30 15 30 ns
TXZ TEXQZ Output Disable Time 15 30 1 5 30 ns
Functional Description
TESTABILITY
The Schottky PROM die includes extra rows and columns of
tusable links for testing the programmability of each chip.
These test fuses are placed at the worst-casts chip locations
to provide the highest possible confidence in the program-
ming tests in the final product. A ROM pattern is also per-
manently fixed in the additional circuitry and coded to pro-
vide a parity check of input address levels. These and other
test circuits are used to test for correct operation of the row
and column-seiect circuits and functionality of input and en-
able gates. All test circuits are available at both water and
assembled device levels to aliow 100% functional and para-
metric testing at every stage of the test flow.
RELIABILITY
As with all National products, the Ti-W PROMs are subject-
ed to an on-going reliability evaluation by the Reliability As-
surance Department. These evaluations employ accelerat-
ed lite tests, including dynamic high-temperature operating
life, temperature-humidity life, temperature cycling, and ther.
mal shock. To date, nearly 7.4 million Schottky Ti-W PROM
device hours have been logged, with samples in Epoxy B
molded DIP (N-package), PLCC (V-package) and CERDIP
(J-package). Device performance in all package configure-
tions is excellent.
TlTANIUM-TUNGSTEN FUSES
National's Programmable Read-Only Memories (PROMs)
feature titanium-tungsten (Ti-W) fuse links designed to pro-
gram efficiently with only 10.5V applied. The high perform-
ance and reliability of these PROMs are the result of fabrica-
tion by a Schottky bipolar process, of which the titanium-
tungsten metallization is an integral part, and the use of an
on-chip programming circuit.
A major advantage of the titanium-tungsten fuse technology
is the low programming voltage of the fuse links. At 10.5V,
this virtually eliminates the need for guard-ring devices and
wide spacings required for other fuse technologies. Care is
taken, however, to minimize voltage drops across the die
and to reduce parasitics. The device is designed to ensure
that worst-case fuse operating current is low enough for
reliable Iong-term operation. The Darlington programming
circuit is liberally designed to insure adequate power density
for blowing the fuse links. The complete circuit design is
optimized to provide high performance over the entire oper-
ating ranges of Vcc and temperature.
ZSZSHWOMBZS‘PSWG
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM54S287AJ - product/dm543287aj?HQS=TI-null-nulI-dscatalog-df-pf—nuII-wwe
DM54S287J - product/dm545287j?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
DM74S287AN - product/dm743287an?HQS=T|-nu|I-nu|I-dscatalog-df—pf—nuII-wwe
DM74S287AJ - product/dm743287aj?HQS=T|—nuII-nulI-dscatalog-df—pf—nuII-wwe
DM74S287AV - product/dm745287av?HQS=T|-null-nulI-dscatalog-df-pf-null-wwe
DM74S287J - product/dm745287j?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
DM74S287N - product/dm743287n?HQS=T|-nulI-nulI-dscatalog-df-pf-nuIl-wwe
DM74S287V - product/dm743287v?HQS=T|-nu|I-nuIl-dscatalog-df-pf-nulI-wwe
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