| Electrical Characteristics....... 412.1 Trademarks..... 247.6 Timing Requirements .. 612.2 Electrostatic Discharge Caution. 247.7 Typical Characteristics. 712.3 Glossary. 248 Detailed Description........ 1213 Mechanical, Packaging, and Orderable8.1 Overview.. 12Information..... 245 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.Changes from Revision A (May 2003) to Revision B Page• Added Device Information and Handling Rating tables, Feature Description section, Device Functional Modes,Application and Implementation section, Power Supply Recommendations section, Layout section, Device andDocumentation Support section, and Mechanical, Packaging, and Orderable Information section . 1Changes from Original (December 2001) to Revision A Page• Added text string "No device pin should be brought high before power is applied to the device." to the Power-OnReset Description. ...... 142 Submit Documentation Feedback Copyright 2001–2014, Texas Instruments IncorporatedProduct Folder Links: DAC8532DAC8532Features 3 DescriptionThe DAC8532 is a dual channel, 16-bit digital-to-1• 16-Bit Monotonic Over Temperatureanalog converter (DAC) offering low power operation• MicroPower Operation: 500 µA at 5 Vand a flexible serial host interface. Each on-chip• Power-On Reset to Zero-Scaleprecision output amplifier allows rail-to-rail outputswing to be achieved over the supply range of 2.7 V• Power Supply: 2.7 V to 5.5 Vto 5.5 V. The device supports a standard 3-wire serial• Settling Time: 10 µs to ±0.003% FSRinterface capable of operating with input data clock• Ultra-Low AC Crosstalk: –100 dB Typfrequencies up to 30 MHz for V = 5 V.DD• Low-Power Serial Interface WithThe DAC8532 requires an external reference voltageSchmitt-Triggered Inputsto set the output range of each DAC channel. The• On-Chip Output Buffer Amplifier With Rail-to-Raildevice incorporates a power-on reset circuit whichOperationensures that the DAC outputs power up at zero-scaleand remain there until a valid write takes place. The• Double-Buffered Input ArchitectureDAC8532 provides a flexible power-down feature,• Simultaneous or Sequential Output Updateaccessible over the serial interface, that reduces theand Powerdowncurrent consumption of the device to 200 nA at 5 V.• Available in a Tiny VSSOP-8 PackageThe low-power consumption of the device in normaloperation makes it ideally suited to portable battery-2 Applicationsoperated equipment and other low-power• Portable Instrumentation applications. The power consumption is 2.5 mW at5 V, reducing to 1 µW in power-down mode.• Closed-Loop Servo ControlThe DAC8532 is available in a VSSOP-8 package• Process Controlwith a specified operating temperature range of• Data Acquisition Systems–40°C to 105°C.• Programmable Attenuation(1)• PC PeripheralsDevice InformationPART NUMBER PACKAGE BODY SIZE (NOM)DAC8532 VSSOP (8) 3.00 mm × 3.00 mm(1) For all available packages, see the orderable addendum atthe end of the datasheet.4 Simplified DiagramV VDD REFData DACDACA V ABufferA RegisterA OUTData DACDACB V BOUTBufferB RegisterB1624−BitChannel LoadPower−DownSerial−to−SYNCSelect ControlControl LogicParallelSCLK2Shift 8D ControlLogicResistorINRegisterNetworkGND1An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.DAC8532SBAS246B–DECEMBER 2001–REVISED NOVEMBER 2014 Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, which do not imply functional operation of the device at these or any other conditions beyond those indicated under RecommendedOperating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.7.2 Handling RatingsMIN MAX UNITT Storage temperature range –65 150 °CstgHuman body model (HBM), per ANSI/ESDA/JEDEC JS-001, all1000(1)pinsV Electrostatic discharge V(ESD)Charged device model (CDM), per JEDEC specification500(2)JESD22-C101, all pins(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.Copyright 2001–2014, Texas Instruments Incorporated Submit Documentation Feedback 3Product Folder Links: DAC8532DAC8532SBAS246B–DECEMBER 2001–REVISED NOVEMBER 2014 |
