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DAC7724U from TI/BB , Texas Instruments 1pcs,12-Bit Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER
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DAC7724U TI/BB N/a 1
DAC7724U from BB, 155pcs , SOP,12-Bit Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER
DAC7724U from TI,TI, Texas Instruments 50pcs , SOIC-DW,12-Bit Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER
FEATURES DESCRIPTIONThe DAC7724 and DAC7725 are 12-bit quad voltagel LOW POWER: 250mW maxoutput digital-to-analog converters with guaranteedl SINGLE SUPPLY OUTPUT RANGE: +10V12-bit monotonic performance over the specified tem-l DUAL SUPPLY OUTPUT RANGE: ±10Vperature range. They accept 12-bit parallel input data,l SETTLING TIME: 10μs to 0.012%have double-buffered DAC input logic (allowing simul-l 12-BIT LINEARITY AND MONOTONICITY:taneous update of all DACs), and provide a readback–40°C to +85°Cmode of the internal input registers. An asynchronousreset clears all registers to a mid-scale code of 800l RESET TO MID-SCALE (DAC7724) ORH(DAC7724) or to a zero-scale of 000 (DAC7725). TheZERO-SCALE (DAC7725) HDAC7724 and DAC7725 can operate from a singlel DATA READBACK+15V supply, or from +15V and –15V supplies.l DOUBLE-BUFFERED DATA INPUTSLow power and small size per DAC make the DAC7724and DAC7725 ideal for automatic test equipment,DAC-per-pin programmers, data acquisition systems,APPLICATIONSand closed-loop servo-control. The DAC7724 andl PROCESS CONTROLDAC7725 are available in a PLCC-28 or a SO-28l CLOSED-LOOP SERVO-CONTROL package, and offer guaranteed specifications over the–40°C to +85°C temperature range.l MOTOR CONTROLl DATA ACQUISITION SYSTEMSV V VGND DD CC REFH12I/O Input DACVDB0-DB11 DAC AOUTABufferRegister A Register AInput DACDAC B VOUTBRegister B Register BA0Input DACDAC C VOUTCControlA1Register C Register CLogicR/WCSInput DACVDAC DOUTDRegister D Register DV VRESET LDAC REFL SSInternational Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 1999 Burr-Brown Corporation PDS-1517B Printed in U.S.A. April, 2000SBAS112SPECIFICATION (DUAL SUPPLY)At T = –40°C to +85°C, V = +15V, V = +5V, V = –15V, V = +10V, V = –10V, unless otherwise noted.A CC DD SS REFH REFL DAC7724N, U DAC7724NB, UBDAC7725N, U DAC7725NB, UBPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITSACCURACY(1)Linearity Error ±2 ±1 LSB(2)Linearity Matching ±2 ±1 LSBDifferential Linearity Error ±1 ±1 LSBMonotonicity T to T 12 [ BitsMIN MAXZero-Scale Error Code = 000 ±2 [ LSBHZero-Scale Drift 1 [ ppm/°C(2)Zero-Scale Matching ±2 ±1 LSBFull-Scale Error Code = FFF ±2 [ LSBH(2)Full-Scale Matching ±2 ±1 LSBPower Supply Sensitivity At Full Scale 10 [ ppm/VANALOG OUTPUT(3)Voltage Output V V [[ VREFL REFHOutput Current ±5 [[ mALoad Capacitance No Oscillation 500 [ pFShort-Circuit Current ±20 [ mAShort-Circuit Duration To V , V , or GND Indefinite [SS CCREFERENCE INPUTV Input Range V +1.25 +10[[ VREFH REFLV Input Range –10 V – 1.25[[ VREFL REFHRef High Input Current –0.5 3.0[[ mARef Low Input Current –3.5 0[[ mADYNAMIC PERFORMANCESettling Time To ±0.012%, 20V Output Step 8 10 [[ μsChannel-to-Channel Crosstalk Full-Scale Step 0.25 [ LSBDigital Feedthrough 2 [ nV-sOutput Noise Voltage f = 10kHz 65 [ nV/√HzDIGITAL INPUT/OUTPUTLogic Family TTL-Compatible CMOS [Logic LevelsV I ≤ ±10μA 2.4 V +0.3[[ VIH IH DDV I ≤ ±10μA –0.3 0.8[[ VIL ILV I = –0.8mA 3.6 V [[ VOH OH DDV I = 1.6mA 0.0 0.4[[ VOL OLData Format Straight Binary [POWER SUPPLY REQUIREMENTSV +4.75 +5.25[[ VDDV +14.25 +15.75[[ VCCV –14.25 –15.75[[ VSSI 50 [[ μADDI 6 8.5 [[ mACCI –8 –6 [[ mASSPower Dissipation 180 250 [[ mWTEMPERATURE RANGESpecified Performance –40 +85[[ °CNOTES: (1) LSB means Least Significant Bit, when V equals +10V and V equals –10V, then one LSB equals 4.88mV. (2) All DAC outputs will match withinREFH REFLthe specified error band. (3) Ideal output voltage, does not take into account zero or full-scale error.The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumesno responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to changewithout notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrantany BURR-BROWN product for use in life support devices and/or systems.®2DAC7724, 7725SPECIFICATION (SINGLE SUPPLY)At T = –40°C to +85°C, V = +15V, V = +5V, V = GND, V = +10V, V = 0V, unless otherwise noted.A CC DD SS REFH REFL DAC7724N, U DAC7724NB, UBDAC7725N, U DAC7725NB, UBPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITSACCURACY(1) (2)Linearity Error ±2 ±1 LSB(3)Linearity Matching ±2 ±1 LSBDifferential Linearity Error ±1 ±1 LSBMonotonicity T to T 12 [ BitsMIN MAXZero-Scale Error Code = 004 ±4 [ LSBHZero-Scale Drift 2 [ ppm/°C(3)Zero-Scale Matching ±4 ±2 LSBFull-Scale Error Code = FFF ±4 [ LSBH(3)Full-Scale Matching ±4 ±2 LSBPower Supply Sensitivity At Full Scale 20 [ ppm/VANALOG OUTPUT(4)Voltage Output V V [[ VREFL REFHOutput Current ±5 [ mALoad Capacitance No Oscillation 500 [ pFShort-Circuit Current ±20 [ mAShort-Circuit Duration To V or GND Indefinite [CCREFERENCE INPUTV Input Range V +1.25 +10[[ VREFH REFLV Input Range 0 V – 1.25[[ VREFL REFHRef High Input Current –0.3 1.5[[ mARef Low Input Current –2.0 0[[ mADYNAMIC PERFORMANCE(5)Settling Time To ±0.012%, 10V Output Step 8 10 [[ μsChannel-to-Channel Crosstalk 0.25 [ LSBDigital Feedthrough 2 [ nV-sOutput Noise Voltage f = 10kHz 65 [ nV/√HzDIGITAL INPUT/OUTPUTLogic Family TTL-Compatible CMOS [Logic LevelsV I ≤ ±10μA 2.4 V +0.3[[ VIH IH DDV I ≤ ±10μA –0.3 0.8[[ VIL ILV I = –0.8mA 3.6 V [[ VOH OH DDV I = 1.6mA 0.0 0.4[[ VOL OLData Format Straight Binary [POWER SUPPLY REQUIREMENTSV +4.75 +5.25[[ VDDV 14.25 15.75[[ VCCI 50 [[ μADDI 3.0 [[ mACCPower Dissipation 45 [ mWTEMPERATURE RANGESpecified Performance –40 +85[[ °CNOTES: (1) If V = 0V, specification applies at code 004 and above. (2) LSB means Least Significant Bit, when V equals +10V and V equals 0V, thenSS H REFH REFLone LSB equals 2.44mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error.(5) Full-scale positive 10V step and negative step from code FFF to 004 .H H®3 DAC7724, 7725(1)ABSOLUTE FEATURES DESCRIPTIONThe DAC7724 and DAC7725 are 12-bit quad voltagel LOW POWER: 250mW maxoutput digital-to-analog converters with guaranteedl SINGLE SUPPLY OUTPUT RANGE: +10V12-bit monotonic performance over the specified tem-l DUAL SUPPLY OUTPUT RANGE: ±10Vperature range. They accept 12-bit parallel input data,l SETTLING TIME: 10μs to 0.012%have double-buffered DAC input logic (allowing simul-l 12-BIT LINEARITY AND MONOTONICITY:taneous update of all DACs), and provide a readback–40°C to +85°Cmode of the internal input registers. An asynchronousreset clears all registers to a mid-scale code of 800l RESET TO MID-SCALE (DAC7724) ORH(DAC7724) or to a zero-scale of 000 (DAC7725). TheZERO-SCALE (DAC7725) HDAC7724 and DAC7725 can operate from a singlel DATA READBACK+15V supply, or from +15V and –15V supplies.l DOUBLE-BUFFERED DATA INPUTSLow power and small size per DAC make the DAC7724and DAC7725 ideal for automatic test equipment,DAC-per-pin programmers, data acquisition systems,APPLICATIONSand closed-loop servo-control. The DAC7724 andl PROCESS CONTROLDAC7725 are available in a PLCC-28 or a SO-28l CLOSED-LOOP SERVO-CONTROL package, and offer guaranteed specifications over the–40°C to +85°C temperature range.l MOTOR CONTROLl DATA ACQUISITION SYSTEMSV V VGND DD CC REFH12I/O Input DACVDB0-DB11 DAC AOUTABufferRegister A Register AInput DACDAC B VOUTBRegister B Register BA0Input DACDAC C VOUTCControlA1Register C Register CLogicR/WCSInput DACVDAC DOUTDRegister D Register DV VRESET LDAC REFL SSInternational Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 1999 Burr-Brown Corporation PDS-1517B Printed in U.S.A. April, 2000SBAS112SPECIFICATION (DUAL SUPPLY)At T = –40°C to +85°C, V = +15V, V = +5V, V = –15V, V = +10V, V = –10V, unless otherwise noted.A CC DD SS REFH REFL DAC7724N, U DAC7724NB, UBDAC7725N, U DAC7725NB, UBPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITSACCURACY(1)Linearity Error ±2 ±1 LSB(2)Linearity Matching ±2 ±1 LSBDifferential Linearity Error ±1 ±1 LSBMonotonicity T to T 12 [ BitsMIN MAXZero-Scale Error Code = 000 ±2 [ LSBHZero-Scale Drift 1 [ ppm/°C(2)Zero-Scale Matching ±2 ±1 LSBFull-Scale Error Code = FFF ±2 [ LSBH(2)Full-Scale Matching ±2 ±1 LSBPower Supply Sensitivity At Full Scale 10 [ ppm/VANALOG OUTPUT(3)Voltage Output V V [[ VREFL REFHOutput Current ±5 [[ mALoad Capacitance No Oscillation 500 [ pFShort-Circuit Current ±20 [ mAShort-Circuit Duration To V , V , or GND Indefinite [SS CCREFERENCE INPUTV Input Range V +1.25 +10[[ VREFH REFLV Input Range –10 V – 1.25[[ VREFL REFHRef High Input Current –0.5 3.0[[ mARef Low Input Current –3.5 0[[ mADYNAMIC PERFORMANCESettling Time To ±0.012%, 20V Output Step 8 10 [[ μsChannel-to-Channel Crosstalk Full-Scale Step 0.25 [ LSBDigital Feedthrough 2 [ nV-sOutput Noise Voltage f = 10kHz 65 [ nV/√HzDIGITAL INPUT/OUTPUTLogic Family TTL-Compatible CMOS [Logic LevelsV I ≤ ±10μA 2.4 V +0.3[[ VIH IH DDV I ≤ ±10μA –0.3 0.8[[ VIL ILV I = –0.8mA 3.6 V [[ VOH OH DDV I = 1.6mA 0.0 0.4[[ VOL OLData Format Straight Binary [POWER SUPPLY REQUIREMENTSV +4.75 +5.25[[ VDDV +14.25 +15.75[[ VCCV –14.25 –15.75[[ VSSI 50 [[ μADDI 6 8.5 [[ mACCI –8 –6 [[ mASSPower Dissipation 180 250 [[ mWTEMPERATURE RANGESpecified Performance –40 +85[[ °CNOTES: (1) LSB means Least Significant Bit, when V equals +10V and V equals –10V, then one LSB equals 4.88mV. (2) All DAC outputs will match withinREFH REFLthe specified error band. (3) Ideal output voltage, does not take into account zero or full-scale error.The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumesno responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to changewithout notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrantany BURR-BROWN product for use in life support devices and/or systems.®2DAC7724, 7725SPECIFICATION (SINGLE SUPPLY)At T = –40°C to +85°C, V = +15V, V = +5V, V = GND, V = +10V, V = 0V, unless otherwise noted.A CC DD SS REFH REFL DAC7724N, U DAC7724NB, UBDAC7725N, U DAC7725NB, UBPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITSACCURACY(1) (2)Linearity Error ±2 ±1 LSB(3)Linearity Matching ±2 ±1 LSBDifferential Linearity Error ±1 ±1 LSBMonotonicity T to T 12 [ BitsMIN MAXZero-Scale Error Code = 004 ±4 [ LSBHZero-Scale Drift 2 [ ppm/°C(3)Zero-Scale Matching ±4 ±2 LSBFull-Scale Error Code = FFF ±4 [ LSBH(3)Full-Scale Matching ±4 ±2 LSBPower Supply Sensitivity At Full Scale 20 [ ppm/VANALOG OUTPUT(4)Voltage Output V V [[ VREFL REFHOutput Current ±5 [ mALoad Capacitance No Oscillation 500 [ pFShort-Circuit Current ±20 [ mAShort-Circuit Duration To V or GND Indefinite [CCREFERENCE INPUTV Input Range V +1.25 +10[[ VREFH REFLV Input Range 0 V – 1.25[[ VREFL REFHRef High Input Current –0.3 1.5[[ mARef Low Input Current –2.0 0[[ mADYNAMIC PERFORMANCE(5)Settling Time To ±0.012%, 10V Output Step 8 10 [[ μsChannel-to-Channel Crosstalk 0.25 [ LSBDigital Feedthrough 2 [ nV-sOutput Noise Voltage f = 10kHz 65 [ nV/√HzDIGITAL INPUT/OUTPUTLogic Family TTL-Compatible CMOS [Logic LevelsV I ≤ ±10μA 2.4 V +0.3[[ VIH IH DDV I ≤ ±10μA –0.3 0.8[[ VIL ILV I = –0.8mA 3.6 V [[ VOH OH DDV I = 1.6mA 0.0 0.4[[ VOL OLData Format Straight Binary [POWER SUPPLY REQUIREMENTSV +4.75 +5.25[[ VDDV 14.25 15.75[[ VCCI 50 [[ μADDI 3.0 [[ mACCPower Dissipation 45 [ mWTEMPERATURE RANGESpecified Performance –40 +85[[ °CNOTES: (1) If V = 0V, specification applies at code 004 and above. (2) LSB means Least Significant Bit, when V equals +10V and V equals 0V, thenSS H REFH REFLone LSB equals 2.44mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error.(5) Full-scale positive 10V step and negative step from code FFF to 004 .H H®3 DAC7724, 7725(1)ABSOLUTE FEATURES DESCRIPTIONThe DAC7724 and DAC7725 are 12-bit quad voltagel LOW POWER: 250mW maxoutput digital-to-analog converters with guaranteedl SINGLE SUPPLY OUTPUT RANGE: +10V12-bit monotonic performance over the specified tem-l DUAL SUPPLY OUTPUT RANGE: ±10Vperature range. They accept 12-bit parallel input data,l SETTLING TIME: 10μs to 0.012%have double-buffered DAC input logic (allowing simul-l 12-BIT LINEARITY AND MONOTONICITY:taneous update of all DACs), and provide a readback–40°C to +85°Cmode of the internal input registers. An asynchronousreset clears all registers to a mid-scale code of 800l RESET TO MID-SCALE (DAC7724) ORH(DAC7724) or to a zero-scale of 000 (DAC7725). TheZERO-SCALE (DAC7725) HDAC7724 and DAC7725 can operate from a singlel DATA READBACK+15V supply, or from +15V and –15V supplies.l DOUBLE-BUFFERED DATA INPUTSLow power and small size per DAC make the DAC7724and DAC7725 ideal for automatic test equipment,DAC-per-pin programmers, data acquisition systems,APPLICATIONSand closed-loop servo-control. The DAC7724 andl PROCESS CONTROLDAC7725 are available in a PLCC-28 or a SO-28l CLOSED-LOOP SERVO-CONTROL package, and offer guaranteed specifications over the–40°C to +85°C temperature range.l MOTOR CONTROLl DATA ACQUISITION SYSTEMSV V VGND DD CC REFH12I/O Input DACVDB0-DB11 DAC AOUTABufferRegister A Register AInput DACDAC B VOUTBRegister B Register BA0Input DACDAC C VOUTCControlA1Register C Register CLogicR/WCSInput DACVDAC DOUTDRegister D Register DV VRESET LDAC REFL SSInternational Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 1999 Burr-Brown Corporation PDS-1517B Printed in U.S.A. April, 2000SBAS112SPECIFICATION (DUAL SUPPLY)At T = –40°C to +85°C, V = +15V, V = +5V, V = –15V, V = +10V, V = –10V, unless otherwise noted.A CC DD SS REFH REFL DAC7724N, U DAC7724NB, UBDAC7725N, U DAC7725NB, UBPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITSACCURACY(1)Linearity Error ±2 ±1 LSB(2)Linearity Matching ±2 ±1 LSBDifferential Linearity Error ±1 ±1 LSBMonotonicity T to T 12 [ BitsMIN MAXZero-Scale Error Code = 000 ±2 [ LSBHZero-Scale Drift 1 [ ppm/°C(2)Zero-Scale Matching ±2 ±1 LSBFull-Scale Error Code = FFF ±2 [ LSBH(2)Full-Scale Matching ±2 ±1 LSBPower Supply Sensitivity At Full Scale 10 [ ppm/VANALOG OUTPUT(3)Voltage Output V V [[ VREFL REFHOutput Current ±5 [[ mALoad Capacitance No Oscillation 500 [ pFShort-Circuit Current ±20 [ mAShort-Circuit Duration To V , V , or GND Indefinite [SS CCREFERENCE INPUTV Input Range V +1.25 +10[[ VREFH REFLV Input Range –10 V – 1.25[[ VREFL REFHRef High Input Current –0.5 3.0[[ mARef Low Input Current –3.5 0[[ mADYNAMIC PERFORMANCESettling Time To ±0.012%, 20V Output Step 8 10 [[ μsChannel-to-Channel Crosstalk Full-Scale Step 0.25 [ LSBDigital Feedthrough 2 [ nV-sOutput Noise Voltage f = 10kHz 65 [ nV/√HzDIGITAL INPUT/OUTPUTLogic Family TTL-Compatible CMOS [Logic LevelsV I ≤ ±10μA 2.4 V +0.3[[ VIH IH DDV I ≤ ±10μA –0.3 0.8[[ VIL ILV I = –0.8mA 3.6 V [[ VOH OH DDV I = 1.6mA 0.0 0.4[[ VOL OLData Format Straight Binary [POWER SUPPLY REQUIREMENTSV +4.75 +5.25[[ VDDV +14.25 +15.75[[ VCCV –14.25 –15.75[[ VSSI 50 [[ μADDI 6 8.5 [[ mACCI –8 –6 [[ mASSPower Dissipation 180 250 [[ mWTEMPERATURE RANGESpecified Performance –40 +85[[ °CNOTES: (1) LSB means Least Significant Bit, when V equals +10V and V equals –10V, then one LSB equals 4.88mV. (2) All DAC outputs will match withinREFH REFLthe specified error band. (3) Ideal output voltage, does not take into account zero or full-scale error.The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumesno responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to changewithout notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrantany BURR-BROWN product for use in life support devices and/or systems.®2DAC7724, 7725SPECIFICATION (SINGLE SUPPLY)At T = –40°C to +85°C, V = +15V, V = +5V, V = GND, V = +10V, V = 0V, unless otherwise noted.A CC DD SS REFH REFL DAC7724N, U DAC7724NB, UBDAC7725N, U DAC7725NB, UBPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITSACCURACY(1) (2)Linearity Error ±2 ±1 LSB(3)Linearity Matching ±2 ±1 LSBDifferential Linearity Error ±1 ±1 LSBMonotonicity T to T 12 [ BitsMIN MAXZero-Scale Error Code = 004 ±4 [ LSBHZero-Scale Drift 2 [ ppm/°C(3)Zero-Scale Matching ±4 ±2 LSBFull-Scale Error Code = FFF ±4 [ LSBH(3)Full-Scale Matching ±4 ±2 LSBPower Supply Sensitivity At Full Scale 20 [ ppm/VANALOG OUTPUT(4)Voltage Output V V [[ VREFL REFHOutput Current ±5 [ mALoad Capacitance No Oscillation 500 [ pFShort-Circuit Current ±20 [ mAShort-Circuit Duration To V or GND Indefinite [CCREFERENCE INPUTV Input Range V +1.25 +10[[ VREFH REFLV Input Range 0 V – 1.25[[ VREFL REFHRef High Input Current –0.3 1.5[[ mARef Low Input Current –2.0 0[[ mADYNAMIC PERFORMANCE(5)Settling Time To ±0.012%, 10V Output Step 8 10 [[ μsChannel-to-Channel Crosstalk 0.25 [ LSBDigital Feedthrough 2 [ nV-sOutput Noise Voltage f = 10kHz 65 [ nV/√HzDIGITAL INPUT/OUTPUTLogic Family TTL-Compatible CMOS [Logic LevelsV I ≤ ±10μA 2.4 V +0.3[[ VIH IH DDV I ≤ ±10μA –0.3 0.8[[ VIL ILV I = –0.8mA 3.6 V [[ VOH OH DDV I = 1.6mA 0.0 0.4[[ VOL OLData Format Straight Binary [POWER SUPPLY REQUIREMENTSV +4.75 +5.25[[ VDDV 14.25 15.75[[ VCCI 50 [[ μADDI 3.0 [[ mACCPower Dissipation 45 [ mWTEMPERATURE RANGESpecified Performance –40 +85[[ °CNOTES: (1) If V = 0V, specification applies at code 004 and above. (2) LSB means Least Significant Bit, when V equals +10V and V equals 0V, thenSS H REFH REFLone LSB equals 2.44mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error.(5) Full-scale positive 10V step and negative step from code FFF to 004 .H H®3 DAC7724, 7725(1)ABSOLUTE
DAC7724U/1KG4 TI
DAC7724U/DAC7724UB TI

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