| FEATURESThe DAC7612 is a dual, 12-bit digital-to-analog con-l LOW POWER: 3.7mWverter (DAC) with guaranteed 12-bit monotonicityl FAST SETTLING: 7m s to 1 LSBperformance over the industrial temperature range. Itl 1mV LSB WITH 4.095V FULL-SCALErequires a single +5V supply and contains an inputRANGEshift register, latch, 2.435V reference, a dual DAC, andl COMPLETE WITH REFERENCEhigh speed rail-to-rail output amplifiers. For a full-scale step, each output will settle to 1 LSB within 7m sl 12-BIT LINEARITY AND MONOTONICITYwhile only consuming 3.7mW.OVER INDUSTRIAL TEMP RANGEl 3-WIRE INTERFACE: Up to 20MHz Clock The synchronous serial interface is compatible with awide variety of DSPs and microcontrollers. Clockl SMALL PACKAGE: 8-Lead SOIC(CLK), Serial Data In (SDI), Chip Select (CS) andLoad DACs (LOADDACS) comprise the serial inter-APPLICATIONSface.l PROCESS CONTROLThe DAC7612 is available in an 8-lead SOIC packagel DATA ACQUISITION SYSTEMS and is fully specified over the industrial temperaturerange of –40* C to +85* C.l CLOSED-LOOP SERVO-CONTROLl PC PERIPHERALSl PORTABLE INSTRUMENTATIONVDD12-Bit DAC AVOUTA12LOADDACS DAC Register A12CSCLK 14-Bit Serial Shift RegisterSDI 12RefDAC Register B1212-Bit DAC BVOUTBDAC7612GNDInternational Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 1999 Burr-Brown Corporation PDS-1501A Printed in U.S.A. June, 1999SBAS106SPECIFICATIONSAt T = –40* C to +85* C, and V = +5V, unless otherwise noted.A DDDAC7612U DAC7612UBPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITSRESOLUTION 12 [ BitsACCURACY(1)Relative Accuracy –2 – 1/2 +2 –1 – 1/4 +1 LSBDifferential Nonlinearity Guaranteed Monotonic –1 – 1/2 +1 –1 – 1/4 +1 LSBZero-Scale Error Code 000 –1 +1 +3 [[[ LSBHZero Scale Match Code 000 1/2 1/2 2 LSBHFull-Scale Voltage Code FFF 4.079 4.095 4.111 4.087 4.095 4.103 VHFull-Scale Match Code FFF 1/2 1/2 2 LSBHANALOG OUTPUTOutput Current Code 800 – 5 – 7 [[ mAHLoad Regulation R ‡ 402W , Code 800 13 [[ LSBLOAD HCapacitive Load No Oscillation 500 [ pFShort-Circuit Current – 15 [ mAShort-Circuit Duration GND or V Indefinite [DDDIGITAL INPUTData Format Serial [Data Coding Straight Binary [Logic Family CMOS [Logic LevelsV 0.7 • V [ VIH DDV 0.3 • V [ VIL DDI – 10 [ m AIHI – 10 [ m AILDYNAMIC PERFORMANCE(2) Settling Time (t ) To – 1 LSB of Final Value 7 [ m sSDAC Glitch 2.5 [ nV-sDigital Feedthrough 0.5 [ nV-sPOWER SUPPLYV +4.75 +5.0 +5.25 [[[ VDDI V = 5V, V = 0V, No Load, at Code 000 0.75 1.5 [[ mADD IH IL HPower Dissipation V = 5V, V = 0V, No Load 3.5 7.5 [[ mWIH ILPower Supply Sensitivity D V = – 5% 0.0025 0.002 [[ %/%DDTEMPERATURE RANGESpecified Performance –40 +85[[ * C[ Same specification as for DAC7612U.NOTES: (1) This term is sometimes referred to as Linearity Error or Integral Nonlinearity (INL). (2) Specification does not apply to negative-going transitions wherethe final output voltage will be within 3 LSBs of ground. In this region, settling time may be double the value indicated.The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumesno responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to changewithout notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrantany BURR-BROWN product for use in life support devices and/or systems.®2DAC7612PIN CONFIGURATION PIN DESCRIPTIONSPIN LABEL DESCRIPTIONTop View SO-81 SDI Serial Data Input. Data is clocked into the internalserial register on the rising edge of CLK.2 CLK Synchronous Clock for the Serial Data Input.3 LOADDACS Loads the internal DAC registers. All DAC registers1 8 VSDIOUTAare transparent latches and are transparent whenLOADDACS is LOW (regardless of the state of CS2 7 VCLKDDor CLK).DAC7612U3 6 GNDLOADDACS4 CS Chip Select. Active LOW.4 5 VCSOUTB 5V DAC B Output VoltageOUTB6 GND Ground7V Positive Power SupplyDD8V DAC A Output VoltageOUTA(1)ABSOLUTE |
