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DAC5681ZIRGCRTIN/a17avai16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85
DAC5681ZIRGCTTIN/a17avai16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85
DAC5681ZIRGCTTI/BBN/a512avai16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85


DAC5681ZIRGCT ,16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85Block Diagram... 1712 Mechanical, Packaging, and Orderable7.3 Feature Description.... 17Information ..
DAC5681ZIRGCT ,16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85Features 3 DescriptionThe DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog1• 16-Bit Digital-to-Analo ..
DAC5682ZIRGCR ,16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85 SLLS853F–AUGUST 2007–REVISED JANUARY 2015Changes from Revision B (April 2008) to Revision C Page• ..
DAC5682ZIRGCT ,16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel Digital-To-Analog Converter (DAC) 64-VQFN -40 to 85Features 3 DescriptionThe DAC5682Z is a dual-channel 16-bit 1.0 GSPS1• 16-Bit Digital-to-Analog Con ..
DAC5686IPZP ,16 Bit 500 MSPS Dual DAC, 16x interpolation, high-performancefeatures a SLEEP mode, which reduces the standby power to approximately 10 mW, thereby minimizing t ..
DAC5686IPZPG4 ,16 Bit 500 MSPS Dual DAC, 16x interpolation, high-performance 100-HTQFP -40 to 85Unmatched gains and offsets at the RF quadrature modulator result in unwanted sideband and local os ..
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DAC5681ZIRGCR-DAC5681ZIRGCT
16-Bit, 1.0 GSPS 2x-4x Interpolating Digital-To-Analog Converter (DAC)
CLKIN
CLKINC
DCLKP
1.2V
Reference
EXTIO
EXTLO
BIASJ
Clock Multiplying
PLL2x-32x
DCLKN
IOUTA1
IOUTA2
16bit
DAC
DelayLock
Loop (DLL)
DLLControl
FIR0
ModeControl
ain
SYNC=’0->1'
(transition)
PLLControl
Clock
Distribution
FDAC
FDAC/2
PLLBypass
PLLEnableA
(x2Bypass) (x1Bypass)
TXEnable=’1'
FDAC/4
SyncDisable
Fir1 E
Buy
Technical
Documents
SLLS865G –AUGUST 2007–REVISED NOVEMBER 2015
DAC5681Z 16-Bit, 1.0 GSPS 2x to 4x Interpolating Digital-To-Analog Converter (DAC) Features 3 Description

The DAC5681Zisa 16-bit 1.0 GSPS digital-to-analog 16-Bit Digital-to-Analog Converter (DAC) converter (DAC) with wideband LVDS data input,• 1.0 GSPS Update Rate integrated2xto4x interpolation filters, on-board clock• 16-Bit Wideband Input LVDS Data Bus multiplier, and internal voltage reference. The
DAC5681Z offers superior linearity, noise, crosstalk,– 8 Sample Input FIFO and PLL phase noise performance.• High Performance
The DAC5681Z integratesa wideband LVDS port– 73-dBc ACLR WCDMA TM1at 180 MHz with on-chip termination. Full-rate input data can be• 2xto 32x Clock Multiplying PLL/VCO transferredtoa single DAC channel,or half-rate and• 2xor4x Interpolation Filters 1/4-rate input data can be interpolated by on-board or 4x FIR filters. Each interpolation FIR is– Stopband Transition 0.4–0.6 Fdata
configurablein either low-passor high-pass mode,– Filters Configurablein Either Low-Passor allowing selectionofa higher order output spectralHigh-Pass Mode image. An on-chip delay lock loop (DLL) simplifies– Allows Selectionof Higher Order Image LVDS interfacing by providing skew control for the
LVDS input data clock.• On-Chip 1.2-V Reference 2to 20-mA Differential Scalable Output The DAC5681Zis characterized for operation over
the industrial temperature rangeof –40°Cto 85°C• 64-Pin 9-mm× 9-mm VQFN Package andis availableina 64-pin VQFN package. Other
members of the family include the dual-channel,2 Applications interpolating DAC5682Z and the single-channel, non-• Cellular Base Stations interpolating DAC5681. Broadband Wireless Access (BWA)
Device Information(1)
• WiMAX 802.16• Fixed Wireless Backhaul• Cable Modem Termination System (CMTS)
(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Functional Block Diagram
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