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BZA956APHIN/a1274avaiQuadruple ESD transient voltage suppressor
BZA956APHILIPSN/a4000avaiQuadruple ESD transient voltage suppressor


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BZA956A
Quadruple ESD transient voltage suppressor

Philips Semiconductors Product specification
Quadruple ESD transient voltage suppressor BZA900A-series
FEATURES
ESD rating >8 kV, according to IEC61000-4-2 SOT665 surface mount package Common anode configuration.
APPLICATIONS
Computers and peripherals Audio and video equipment Communication systems
DESCRIPTION

Monolithic transient voltage suppressor diodeina fivelead
SOT665 package for 4-bit wide ESD transient
suppression.
MARKING
PINNING
LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).
Notes
DC working current limited by Ptot(max). Device mounted on standard printed-circuit board.
Philips Semiconductors Product specification
Quadruple ESD transient voltage suppressor BZA900A-series
THERMAL CHARACTERISTICS
Note
Solder point of common anode (pin2).
ELECTRICAL CHARACTERISTICS
=25 °C unless otherwise specified.
Table 1
Per type; BZ956Ato BZA968A =25 °C unless otherwise specified.
Philips Semiconductors Product specification
Quadruple ESD transient voltage suppressor BZA900A-series
GRAPHICAL DATA
Philips Semiconductors Product specification
Quadruple ESD transient voltage suppressor BZA900A-series
Philips Semiconductors Product specification
Quadruple ESD transient voltage suppressor BZA900A-series
APPLICATION INFORMATION
Typical common anode application
quadruple transient suppressorina SOT665 package makesit possibleto protect four separate lines using only one
package. A simplified example is shown in Fig.7.
Device placement and printed-circuit board layout

Circuit board layoutisof extreme importancein the suppressionof transients. The clamping voltageof the BZA900Ais
determined bythe peak transient current and the rateof riseof that current (di/dt). Since parasitic inductances can further
add to the clamping voltage (V=L di/dt) the series conductor lengths on the printed-circuit board should be kept to a
minimum. This includes the lead length of the suppression element.
In addition to minimizing conductor length the following printed-circuit board layout guidelines are recommended: Place the suppression element close to the input terminals or connectors Keep parallel signal paths to a minimum Avoid running protection conductors in parallel with unprotected conductors Minimize all printed-circuit board loop areas including power and ground loops Minimize the length of the transient return path to ground Avoid using shared transient return paths to a common ground point.
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