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BUK964R2-55B |BUK964R255BPHN/a148avaiN-channel TrenchMOS logic level FET


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BUK964R2-55B
N-channel TrenchMOS logic level FET
BUK964R2-55B
N-channel TrenchMOS logic level FET
Rev. 03 — 4 June 2010 Product data sheet Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits Low conduction losses due to low
on-state resistance Q101 compliant Suitable for logic level gate drive
sources Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications 12 V and 24 V loads Automotive systems General purpose power switching Motors, lamps and solenoids
1.4 Quick reference data Table 1. Quick reference data
VDS drain-source
voltage≥25 °C; Tj≤ 175°C --55 V drain current VGS =5V; Tmb =25°C;
see Figure 3; see Figure 1
[1] --75 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 --300 W
Static characteristics
RDSon drain-source
on-state
resistance
VGS =5V; ID =25A; =25°C;
see Figure 11; see Figure 12
-3.5 4.2 mΩ
VGS =10V; ID =25A; =25°C
-3.1 3.7 mΩ
Avalanche ruggedness
NXP Semiconductors BUK964R2-55B
N-channel TrenchMOS logic level FET
[1] Continuous current is limited by package. Pinning information
[1] It is not possible to make a connection to pin 2. Ordering information
EDS(AL)S non-repetitive
drain-source
avalanche energy =75A; Vsup≤55V;
RGS =50 Ω; VGS =5V;
Tj(init)=25 °C; unclamped
--1.2 J
Dynamic characteristics
QGD gate-drain charge VGS =5V; ID =25A;
VDS =44 V; Tj =25°C;
see Figure 13
-37 - nC
Table 1. Quick reference data …continued
Table 2. Pinning information
Table 3. Ordering information
BUK964R2-55B D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
SOT404
NXP Semiconductors BUK964R2-55B
N-channel TrenchMOS logic level FET Limiting values
[1] Continuous current is limited by package.
[2] Current is limited by power dissipation chip rating.
[3] Current is limited by power dissipation chip rating.
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C --55 V
VDGR drain-gate voltage RGS =20kΩ --55 V
VGS gate-source voltage -15 - 15 V drain current Tmb =25°C; VGS =5V; see Figure 3;
see Figure 1
[1] --75 A
Tmb =100 °C; VGS =5V; see Figure 1 [1] --75 A
Tmb =25°C; VGS =5V; see Figure 1;
see Figure 3
[2] - - 191 A
IDM peak drain current Tmb =25°C; tp≤10 µs; pulsed;
see Figure 3 - 765 A
Ptot total power dissipation Tmb =25°C; see Figure 2 - - 300 W
Tstg storage temperature -55 - 175 °C junction temperature -55 - 175 °C
Source-drain diode source current Tmb =25°C [1] --75 A
[3] - - 191 A
ISM peak source current tp≤10 µs; pulsed; Tmb=25°C - - 765 A
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy =75A; Vsup≤55 V; RGS =50Ω;
VGS =5V; Tj(init)=25 °C; unclamped
--1.2 J
NXP Semiconductors BUK964R2-55B
N-channel TrenchMOS logic level FET
NXP Semiconductors BUK964R2-55B
N-channel TrenchMOS logic level FET Thermal characteristics
Table 5. Thermal characteristics
Rth(j-mb) thermal resistance
from junction to
mounting base
see Figure 4 --0.5 K/W
Rth(j-a) thermal resistance
from junction to
ambient
minimum footprint; mounted on a
printed circuit-board
-50 - K/W
NXP Semiconductors BUK964R2-55B
N-channel TrenchMOS logic level FET CharacteristicsTable 6. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =0.25mA; VGS =0V; Tj= -55°C 50 - - V =0.25mA; VGS =0V; Tj=25°C 55 --V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =25°C;
see Figure 10
1.1 1.5 2 V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 10
--2.3 V =1mA; VDS =VGS; Tj= 175 °C;
see Figure 10
0.5 --V
IDSS drain leakage current VDS =55V; VGS =0V; Tj=25°C - 0.02 1 µA
VDS =55V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VDS =0V; VGS =15V; Tj=25°C - 2 100 nA
VDS =0V; VGS =-15 V; Tj=25°C - 2 100 nA
RDSon drain-source on-state
resistance
VGS =5V; ID =25A; Tj =25 °C;
see Figure 11; see Figure 12
-3.5 4.2 mΩ
VGS =4.5 V; ID =25A; Tj=25°C --4.4 mΩ
VGS =5V; ID =25A; Tj= 175 °C;
see Figure 11; see Figure 12
--8.4 mΩ
VGS =10V; ID =25A; Tj =25°C - 3.1 3.7 mΩ
Dynamic characteristics
QG(tot) total gate charge ID =25A; VDS =44V; VGS =5V; =25°C; see Figure 13
-95 - nC
QGS gate-source charge - 17 - nC
QGD gate-drain charge - 37 - nC
Ciss input capacitance VGS =0V; VDS =25V; f=1MHz; =25°C; see Figure 14 7665 10220 pF
Coss output capacitance - 1044 1253 pF
Crss reverse transfer
capacitance 466 638 pF
td(on) turn-on delay time VDS =30V; RL =1.2 Ω; VGS =5V;
RG(ext) =10 Ω; Tj =25°C
-63 - ns rise time - 232 - ns
td(off) turn-off delay time - 273 - ns fall time - 178 - ns internal drain
inductance
from upper edge of drain mounting base
to centre of die SOT404; Tj =25°C
-2.5 -nH
from drain lead 6 mm from package to
centre of die ; Tj =25°C
-4.5 -nH internal source
inductance
from source lead to source bond pad; =25°C
-7.5 -nH
Source-drain diode
NXP Semiconductors BUK964R2-55B
N-channel TrenchMOS logic level FET
VSD source-drain voltage IS =40A; VGS =0V; Tj =25°C;
see Figure 15 0.85 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs;
VGS =-10 V; VDS =30 V; Tj =25°C
-78 - ns recovered charge - 171 - nC
Table 6. Characteristics …continued
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