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C25P20FR , LOW FORWARD VOLTAGE DROP
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C2611 , Collector-emitter Voltage: V(BR)CEO=400V, Collector Current: IC=0.2A
C2611 , Collector-emitter Voltage: V(BR)CEO=400V, Collector Current: IC=0.2A
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BUK9618-55A
TrenchMOS(tm) logic level FET
BUK9518-55A; BUK9618-55A renchMOS™ logic level FET
Rev. 01 — 27 August 2001 Product data DescriptionN-channel enhancement mode field-effect power transistorina plastic package using
TrenchMOS™ technology, featuring very low on-state resistance.
Product availability:
BUK9518-55A in SOT78 (TO-220AB)
BUK9618-55A in SOT404 (D2 -PAK).
Features TrenchMOS™ technology Q101 compliant 175 °C rated Logic level compatible.
Applications Automotive and general purpose power switching: 12 V and 24 V loads Motors, lamps and solenoids.
Pinning information
Table 1: Pinning - SOT78 and SOT404, simplified outline and symbol gate (g)
SOT78 (TO-220AB) SOT404 (D2 -PAK) drain (d) source (s) mounting base;
connected to drain (d)
MBK106
MBK116
MBB076
Philips Semiconductors BUK9518-55A; BUK9618-55A
TrenchMOS™ logic level FET Quick reference data Limiting values
Table 2: Quick reference dataVDS drain-source voltage (DC) − 55 V drain current (DC) Tmb =25 °C; VGS =5V − 61 A
Ptot total power dissipation Tmb =25°C − 136 W junction temperature − 175 °C
RDSon drain-source on-state resistance Tj =25 °C; VGS =5V; ID=25A 14 18 mΩ =25 °C; VGS= 4.5 V; ID =25A − 19 mΩ =25 °C; VGS=10 V; ID=25A 12 16 mΩ
Table 3: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) − 55 V
VDGR drain-gate voltage (DC) RGS =20kΩ− 55 V
VGS gate-source voltage (DC) −±15 V drain current (DC) Tmb =25 °C; VGS =5V;
Figure2 and3 61 A
Tmb= 100 °C; VGS =5V; Figure2 − 43 A
IDM peak drain current Tmb =25 °C; pulsed; tp≤10 μs;
Figure3 246 A
Ptot total power dissipation Tmb =25 °C; Figure1 − 136 W
Tstg storage temperature −55 +175 °C operating junction temperature −55 +175 °C
Source-drain diodeIDR reverse drain current (DC) Tmb =25°C − 61 A
IDRM pulsed reverse drain current Tmb =25 °C; pulsed; tp≤10μs − 246 A
Avalanche ruggednessWDSS non-repetitive avalanche energy unclamped inductive load; ID =61A;
VDS≤55 V; VGS =5V; RGS =50Ω;
starting Tmb =25°C 127 mJ
Philips Semiconductors BUK9518-55A; BUK9618-55A
TrenchMOS™ logic level FET
Philips Semiconductors BUK9518-55A; BUK9618-55A
TrenchMOS™ logic level FET Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristicsRth(j-a) thermal resistance from junction to ambient vertical in still air; SOT78 package 60 K/W
mounted on printed circuit board;
minimum footprint; SOT404
package K/W
Rth(j-mb) thermal resistance from junction to mounting
base
Figure4 1.1 K/W
Philips Semiconductors BUK9518-55A; BUK9618-55A
TrenchMOS™ logic level FET Characteristics
Table 5: Characteristics =25 °C unless otherwise specified
Static characteristicsV(BR)DSS drain-source breakdown
voltage= 0.25 mA; VGS =0V =25 °C55 −− V= −55 °C50 −− V
VGS(th) gate-source threshold voltageID=1 mA; VDS =VGS; Figure9 =25°C 1 1.5 2 V= 175°C 0.5 −− V= −55°C −− 2.3 V
IDSS drain-source leakage current VDS=55 V; VGS =0V =25°C − 0.05 10 μA= 175°C −− 500 μA
IGSS gate-source leakage current VGS= ±10 V; VDS =0V − 2 100 nA
RDSon drain-source on-state
resistance
VGS =5V; ID =25A;
Figure7 and8 =25°C − 14 18 mΩ= 175°C −− 36 mΩ
VGS= 4.5 V; ID =25A −− 19 mΩ
VGS =10V; ID =25A − 12 16 mΩ
Dynamic characteristicsQg(tot) total gate charge VGS =5V;VDD =44V; =25A; Figure14 34 − nC
Qgs gate-to-source charge − 4.5 − nC
Qgd gate-to-drain (Miller) charge − 14 − nC
Ciss input capacitance VGS =0V; VDS =25V;=1 MHz; Figure12 1660 2210 pF
Coss output capacitance − 290 350 pF
Crss reverse transfer capacitance − 190 270 pF
td(on) turn-on delay time VDD=30 V; RL= 1.2Ω;
VGS =5V; RG =10Ω 21 − ns rise time − 126 − ns
td(off) turn-off delay time − 95 − ns fall time − 97 − ns internal drain inductance from drain lead 6 mm from
package to centre of die 4.5 − nH
from contact screw on
mounting baseto centreof die
SOT78 3.5 − nH
from upper edge of drain
mounting baseto centreof die
SOT404 2.5 − nH internal source inductance from source lead to source
bond pad 7.5 − nH
Philips Semiconductors BUK9518-55A; BUK9618-55A
TrenchMOS™ logic level FET
Source-drain diodeVSD source-drain (diode forward)
voltage=20 A; VGS =0V; Figure15 − 0.85 1.2 V
trr reverse recovery time IS=20 A; dIS/dt= −100 A/μs
VGS= −10 V; VDS =30V 53 − ns recovered charge − 101 − nC
Table 5: Characteristics…continued =25 °C unless otherwise specified
Philips Semiconductors BUK9518-55A; BUK9618-55A
TrenchMOS™ logic level FET
