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BUK9540-100A |BUK9540100A0619N/a1000avaiTrenchMOS(tm) logic level FET
BUK9640-100A |BUK9640100APHILIPSN/a370avaiTrenchMOS(tm) logic level FET


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BUK9540-100A-BUK9640-100A
TrenchMOS(tm) logic level FET
BUK95/9640-100A renchMOS™ logic level FET
Rev. 03 — 08 February 2002 Product data Description

N-channel enhancement mode field-effect power transistorina plastic package using
TrenchMOS™ technology, featuring very low on-state resistance.
Product availability:
BUK9540-100A in SOT78 (TO-220AB)
BUK9640-100A in SOT404 (D2 -PAK). Features TrenchMOS™ technology Q101 compliant 175 °C rated Logic level compatible. Applications Automotive and general purpose power switching: 12 V, 24 V, and 42 V loads Motors, lamps and solenoids. Pinning information
[1] It is not possible to make connection to pin 2 of the SOT404 package.
Table 1: Pinning - SOT78 and SOT404, simplified outline and symbol
gate (g)
SOT78 (TO-220AB) SOT404 (D2 -PAK)
drain (d) [1] source (s) mounting base;
connected to drain (d)
MBK106 13
MBK116
MBB076
Philips Semiconductors BUK95/9640-100A
TrenchMOS™ logic level FET Quick reference data Limiting values
Table 2: Quick reference data

VDS drain-source voltage (DC) - 100 V drain current (DC) Tmb =25 °C; VGS =5V - 39 A
Ptot total power dissipation Tmb =25°C - 158 W junction temperature - 175 °C
RDSon drain-source on-state resistance Tj =25 °C; VGS =5V; ID=25A 34 40 mΩ =25 °C; VGS= 4.5 V; ID =25A - 43 mΩ =25 °C; VGS=10 V; ID=25A 29 39 mΩ
Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) - 100 V
VDGR drain-gate voltage (DC) RGS =20kΩ - 100 V
VGS gate-source voltage (DC) - ±15 V drain current (DC) Tmb =25 °C; VGS =5V;
Figure2 and3
-39 A
Tmb= 100 °C; VGS =5V; Figure2 -28 A
IDM drain current (peak value) Tmb =25 °C; pulsed; tp≤10 μs;
Figure3 159 A
Ptot total power dissipation Tmb =25 °C; Figure1 - 158 W
Tstg storage temperature −55 +175 °C operating junction temperature −55 +175 °C
Source-drain diode

IDR reverse drain current Tmb =25°C - 39 A
IDRM peak reverse drain current Tmb =25 °C; pulsed; tp≤10μs - 159 A
Avalanche ruggedness

EDS(AL)S non-repetitive avalanche energy unclamped inductive load; ID =39A;
VDS≤ 100 V; VGS =5V; RGS =50Ω;
starting Tmb =25°C 182 mJ
Philips Semiconductors BUK95/9640-100A
TrenchMOS™ logic level FET
Philips Semiconductors BUK95/9640-100A
TrenchMOS™ logic level FET Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristics

Rth(j-mb) thermal resistance from junction to
mounting base
Figure4 −− 0.95 K/W
Rth(j-a) thermal resistance from junction to ambient vertical in still air; SOT78 package − 60 − K/W
mounted on a printed circuit board;
minimum footprint; SOT404 package 50 − K/W
Philips Semiconductors BUK95/9640-100A
TrenchMOS™ logic level FET Characteristics
Table 5: Characteristics
=25 °C unless otherwise specified.
Static characteristics

V(BR)DSS drain-source breakdown
voltage= 0.25 mA; VGS =0V =25°C 100 - V= −55 °C89 - - V
VGS(th) gate-source threshold voltageID=1 mA; VDS =VGS;
Figure9 =25°C 1 1.5 2 V= 175°C 0.5 - - V= −55°C - - 2.3 V
IDSS drain-source leakage current VDS= 100 V; VGS =0V =25°C - 0.05 10 μA= 175°C - - 500 μA
IGSS gate-source leakage current VGS= ±10 V; VDS=0V - 2 100 nA
RDSon drain-source on-state
resistance
VGS =5V; ID =25A;
Figure7 and8 =25°C - 34 40 mΩ= 175°C - - 100 mΩ
VGS= 4.5 V; ID =25A - - 43 mΩ
VGS =10V; ID =25A - 29 39 mΩ
Dynamic characteristics

Qg(tot) total gate charge VGS =5V; VDD =80V; =25A; Figure14
-48 - nC
Qgs gate-to-source charge - 5.4 - nC
Qgd gate-to-drain (Miller) charge - 20 - nC
Ciss input capacitance VGS =0V; VDS =25V;=1 MHz; Figure12 2304 3072 pF
Coss output capacitance - 222 266 pF
Crss reverse transfer capacitance - 151 207 pF
td(on) turn-on delay time VDD=30 V; RL= 1.2Ω;
VGS =5V; RG =10Ω
-20 - ns rise time - 135 - ns
td(off) turn-off delay time - 125 - ns fall time - 90 - ns internal drain inductance from drain lead 6 mm from
package to centre of die 4.5 - nH
from contact screw on
mounting base to centre of
die SOT78 3.5 - nH
from upper edge of drain
mounting base to centre of
die SOT404 2.5 - nH internal source inductance from source lead to source
bond pad 7.5 - nH
Philips Semiconductors BUK95/9640-100A
TrenchMOS™ logic level FET
Source-drain diode

VSD source-drain (diode forward)
voltage=25 A; VGS =0V;
Figure15 0.85 1.2 V
trr reverse recovery time IS =37A; dIS/dt= −100 A/μs
VGS= −10 V; VDS =30V
-60 - ns recovered charge - 240 - nC
Table 5: Characteristics…continued
=25 °C unless otherwise specified.
Philips Semiconductors BUK95/9640-100A
TrenchMOS™ logic level FET
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