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BUK9225-55A
N-channel TrenchMOS logic level FET
Product profile1.1 General descriptionLogic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits AEC Q101 compliant Low conduction losses due to low
on-state resistance Suitable for logic level gate drive
sources Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications 12 V and 24 V loads Automotive and general purpose
power switching Motors, lamps and solenoids
1.4 Quick reference data
BUK9225-55A
N-channel TrenchMOS logic level FET
Rev. 02 — 7 February 2011 Product data sheet
Table 1. Quick reference dataVDS drain-source
voltage≥25 °C; Tj≤ 175°C --55 V drain current VGS =5V; Tmb =25°C;
see Figure 1; see Figure 3
--43 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 --94 W
NXP Semiconductors BUK9225-55A
N-channel TrenchMOS logic level FET Pinning information Ordering information
Static characteristicsRDSon drain-source
on-state
resistance
VGS =4.5 V; ID =25A; =25°C
--27 mΩ
VGS =10V; ID =25A; =25°C 1922mΩ
VGS =5V; ID =25A; =25°C; see Figure 12;
see Figure 13 2125mΩ
Avalanche ruggednessEDS(AL)S non-repetitive
drain-source
avalanche energy =43A; Vsup≤55V;
RGS =50 Ω; VGS =5V;
Tj(init)=25 °C; unclamped
--123 mJ
Table 1. Quick reference data …continued
Table 2. Pinning information
Table 3. Ordering informationBUK9225-55A DPAK plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
SOT428
NXP Semiconductors BUK9225-55A
N-channel TrenchMOS logic level FET Limiting values[1] peak drain current is limited by chip, not package.
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 55 V
VDGR drain-gate voltage RGS =20kΩ -55 V
VGS gate-source voltage -15 15 V drain current Tmb =25°C; VGS =5V; see Figure 1;
see Figure 3
-43 A
Tmb =100 °C; VGS =5V; see Figure 1 -30 A
IDM peak drain current Tmb=25 °C; pulsed; tp≤10 µs;
see Figure 3
[1] - 173 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -94 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Source-drain diode source current Tmb =25°C - 43 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 173 A
Avalanche ruggednessEDS(AL)S non-repetitive drain-source
avalanche energy =43A; Vsup≤55 V; RGS =50Ω;
VGS =5V; Tj(init)=25 °C; unclamped 123 mJ
NXP Semiconductors BUK9225-55A
N-channel TrenchMOS logic level FET Thermal characteristics
Table 5. Thermal characteristicsRth(j-mb) thermal resistance from junction to mounting base see Figure 4 --1.6 K/W
Rth(j-a) thermal resistance from
junction to ambient 71.4 - K/W
NXP Semiconductors BUK9225-55A
N-channel TrenchMOS logic level FET Characteristics
Table 6. Characteristics
Static characteristicsV(BR)DSS drain-source
breakdown voltage =0.25mA; VGS =0V; Tj=25°C 55 --V =0.25mA; VGS =0V; Tj= -55°C 50 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =25°C;
see Figure 11
11.5 2V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 11
--2.3 V =1mA; VDS =VGS; Tj= 175 °C;
see Figure 11
0.5 --V
IDSS drain leakage current VDS =55V; VGS =0V; Tj=25°C - 0.05 10 µA
VDS =55V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =10V; VDS =0V; Tj=25°C - 2 100 nA
VGS =-10 V; VDS =0V; Tj=25°C - 2 100 nA
RDSon drain-source on-state
resistance
VGS =4.5 V; ID =25A; Tj=25°C --27 mΩ
VGS =5V; ID =25A; Tj= 175 °C;
see Figure 12; see Figure 13
--50 mΩ
VGS =10V; ID =25A; Tj=25°C - 19 22 mΩ
VGS =5V; ID =25A; Tj =25 °C;
see Figure 12; see Figure 13 2125mΩ
Dynamic characteristicsCiss input capacitance VGS =0V; VDS =25V; f=1MHz; =25°C; see Figure 14 1360 1724 pF
Coss output capacitance - 240 287 pF
Crss reverse transfer
capacitance 160 222 pF
td(on) turn-on delay time VDS =30V; RL =1.2 Ω; VGS =5V;
RG(ext) =10 Ω; Tj =25°C
-17 -ns rise time - 104 - ns
td(off) turn-off delay time - 82 - ns fall time - 80 - ns internal drain
inductance
measured from drain to centre of die; =25°C
-2.5 -nH internal source
inductance
measured from source lead to source
bond pad; Tj =25°C
-7.5 -nH
Source-drain diodeVSD source-drain voltage IS =15A; VGS =0V; Tj =25°C;
see Figure 15 0.85 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs;
VGS =-10 V; VDS =30 V; Tj =25°C
-50 -ns recovered charge - 85 - nC
NXP Semiconductors BUK9225-55A
N-channel TrenchMOS logic level FET
NXP Semiconductors BUK9225-55A
N-channel TrenchMOS logic level FET
