ADV453KP40 ,CMOS 40 MHz monolithic 256 x 24 color palette RAM-DACREV. B
ANALOG CMOS 40 MHz Monolithic
DEVICES 256 x 24 Color Palette RAM-DAc
1.1 Scope.
Th ..
ADV453TQ/883B ,CMOS 40 MHz Monolithic 256 x 24 Color Palette RAM-DACREV. B
ANALOG CMOS 40 MHz Monolithic
DEVICES 256 x 24 Color Palette RAM-DAc
1.1 Scope.
Th ..
ADV471KP35 ,CMOS 80 MHz Monolithic 256 x 24(18) Color Palette RAM-DACsFEATURES
Personal System/2'' Compatible
80MHz Pipelined Operation
Triple 8-Bit (6-Bit) D/A C ..
ADV471KP50 ,CMOS 80 MHz Monolithic 256 x 24(18) Color Palette RAM-DACsApplications
Image Processing
Instrumentation
Desktop Publishing
AVAILABLE CLOCK RATES
80M ..
ADV471KP66 ,CMOS 80 MHz Monolithic 256 x 24(18) Color Palette RAM-DACsANALOG
DEVICES
CMOS 80MHz Monolithic 256 x 24(18)
Color Palette RAM-DACs
AlW478/NW471
ADV471KP80 ,CMOS 80 MHz Monolithic 256 x 24(18) Color Palette RAM-DACsSpecifications TmtoTMS.)
I
Parameter KPSO Version KP35 Version Units Conditions/Comments
80 ..
AM27C256 , 256 Kilobit (32 K x 8-Bit) CMOS EPRO
AM27C256 , 256 Kilobit (32 K x 8-Bit) CMOS EPRO
AM27C256-120DC , 256 Kilobit (32 K x 8-Bit) CMOS EPRO
AM27C256-120DC , 256 Kilobit (32 K x 8-Bit) CMOS EPRO
AM27C256-120DC , 256 Kilobit (32 K x 8-Bit) CMOS EPRO
AM27C256-120DE , 256 Kilobit (32 K x 8-Bit) CMOS EPRO
ADV453KN40-ADV453KN66-ADV453KP40
CMOS 40 MHz monolithic 256 x 24 color palette RAM-DAC
ANALOG CMOS 40 MHz Monolithic
DEVICES 256 x 24 Color Palette RAM-DAC
ADV453
REV. B
1.1 Scope.
This specification covers the detail requirements for Class B microcircuits in accordance with 1.2.1 of
MIL-STD-883, provisions for the use of MIL-STD-883 in conjunction with complaint non-JAN devices.
The device is a 40 MHz Monolithic 256 X 24 Color Palette RAM-DAC.
1.2 Part Number.
The complete part number per Table 1 of this specification is as follows:
Device Part Number
- 1 ADV453TQ/883B
--2 ADV453TE/883B
1.2.3 Case Outline.
See Appendix 1 of General Specification ADi-M-1000: package outline:
(X) Package Description Lead F inish
Q Q-40 40-Lead Dual-In-Line Package Hot Solder DIP
E E-44A 44-Lead LCC Hot Solder DIP
1.3 Absolute Maximum Ratings.
Supply Voltage (VAA) ...................................................... +7.0 V
Digital Input Voltage (VIN) to AGND ............................... -0.5 V to VAA +0.5 V
Analog Output Short Circuit Duration to Any Power Supply or Common ............... Indefinite
Power Dissipation ....................................................... 1575 mW
Storage Temperature ............................................... -65°C to + 150°C
Lead Temperature (Soldering 10 sec) ........................................... +300°C
Junction Temperature ..................................................... + 175°C
1.5 Thermal Characteristics.
Thermal Resistance b: 1L= See MIL-M-38510 Appendix C
61A = IZOOCIW for Q
em = 50°C/W for E
DIGITAL-TO-ANALOG CONVERTERS 8-197
DIGITAL-TO-ANALOG CONVERTERS
ADV453 "-SPiiiyFliWl0lG
Table I.
Conditions1
Limit Group A (-55'C 5 TA 5 +125°C
Test Symbol Min Max Subgroups unless otherwise noted) Units
Resolution (Each DAC) 8.0 8.0 4 Bits
Relative Accuracy (Each DAC)
Integral Nonlinearity IL t2 1, 2, 3 LSB
Differential Nonlinearity DL tl 1, 2, 3 Conversion Rate is 1 MHz LSB
Gray Scale Error :5 l, 2, 3 White Level Relative to Blank % Gray Scale
Digital Input High Voltage V," 2.4 7, 8 V
Digital Input Low Voltage V11. 0.8 7, 8 V
Digital Input Current Im 10 l, 2, 3 Vm = 0 V or VAA WA
Digital Input Capacitance Cm 10 4 pF
Digital Output High Voltage Vor, 2.4 l, 2, 3 Isouxca = 400 wA
Digital Output Low Voltage Voc 0.4 1, 2, 3 ISINK = 3.2 mA V
Floating State Output Current Ioz 10 1, 2, 3 Vo: = 0 V or VA, "
Floating State Output Capacitance CDOUT 20 4 pF
Gray Scale Current Range 15 22 1, 2, 3 mA
Output Current
White Level Relative to Blank 17.69 20.40 1, 2, 3 mA
White Level Relative to Black 16.74 18.50
Black Level Relative to Blank 0.95 1.90
Blank Level on IOR, 108 0 50 l, 2, 3 wh
Blank Level on iOG 6.29 8.96 mA
Sync Level on IOG 0 50 "
DAC to DAC Matching 6 1, 2, 3 White Level Relative to Blank %
Output Compliance' Voc - 1.0 1.4 l, 2, 3 V
Output Capacitance CAOUT 40 4 IOUT T2T 0 mA pF
Voltage Reference Range3 1.14 1.26 l, 2, 3 V
Power Supply Current IAA 300 l, 2, 3 mA
Power Supply Rejection Ratio PSRR 30 l, 2, 3 Va, = 5.0 V dB
(White Level Relative to Black) Delta VAA = +5% or -5%
(0.5 V 1 kHz Sinewave Applied to VM)
a co, Cl Setup Time tt 35 9, 10, 11 ns
a co, Cl Hold Time te 35 9, 10, 11 ns
RE, -ErTt High Time ts 25 9, 10, 11 ns.
tii5 Assert to Data Bus Driven t4 2 9, 10, 11 ns
ITI5 Assert to Data Valid ts 100 9, 10, 11 ns
kT5 Negated to Data Bus Three Stated ts 20 9, 10, 11 ns
kro, NTrit- Low Time t7 so 9, 10, 11 ns
8--198 DIGITAL-TO-ANALOG CONVERTERS
REV. B
ADV453
Conditions'
Limit Group A (-55''C YS, TA 5 +125°C
Test Symbol Min Max Subgroups unless otherwise noted) Units
Write Data Setup Time ts 35 9, 10, 11 ns
Write Data Hold Time t9 10 9, 10, ll ns
Pixel and Control Setup Time tio 7 9, 10, 11 ns
Pixel and Control Hold Time ts, 3 9, 10, 11 ns
Clock Cycle Time' tn 25 9, 10, 11 ns
Clock Pulse Width High Time tis 7 9, 10, 11 ns
Clock Pulse Width Low Time tu 7 9, 10, 11 ns
Analog Output Delay hs 30 9, 10, ll CLK = 4 MHz ns
Analog Output Rise/Fall Time tis 8 9, 10, ll CLK = 4 MHz ns
Pipeline Delay3 tpD 2xtte 9, 10, 11 ns
Analog Output Skew tsx 2 9, 10, ll CLK = 4 MHz ns
lVM = +4.75 V to +5.25 V, VREF = 1.235 v, Rssr = 280 n, [sync connected to 100, unless otherwise specified.
'Tested on initial release and after any redesign which may affect this pamnctcr.
'These tests axe done on a pass/fail basis only. Minimum andlor maximum conditions (as appropriate) are used as input conditions.
'Digital input values are 0 to 3 V, with input rise/fall time, < 3 ns measured between the 10% and 90% points. Timing reference points are at 50% for inputs an
outputs. See Figure l.
REV. B
DIGITAL-TO-ANALOG CONVERTERS 8- 199
DlGlTAL-TO-ANALOG CONVERTERS
ADV453
3.2.1 Functional Block Diagram and Terminal Assignments.
" ADJUST
ADV453
REFERENCE
AMPLIFIER
256 x "
COLOR PALETTE
JwLJi °L
ADDRESS
REGISTER
Q Package (DIP)
lla, E ADV453
P7 E (Nona Scale)
TOP VIEW
E FSANUST
Ciiil VREF
Eil lla,
E coup
E ‘smc
E] I08
32 GND
E lla,
E CLOCK
E SYNC
21 BLANK
8-200 DIGITAL-TO-ANALOG CONVERTERS
BUS CONTROL
ADV453
TOP VIEW
(Not to Scale)
REV. B
ADV453
REV. B
Table 2. Electrical Test Requirements
MIL-STD-883 Test Requirements
Subgroups
(Per Method 5005 Table l)
Interim Electrical Parameters
(Method 5004)
Final Electrical Test Parameters
(Method 5004)
1*, 2, 3, 7, 8, 9,10,11
Group A Test Requirements
(Method 5005)
l, 2, 3, 7, 8A, 8B, 9,10,11
Group C and D Endpoint Electrical
Parameters (Method 5005)
'PDA applies to subgroup I.
4.3.2 Group C and D Inspections
a. Endpoint electrical parameters shall be as specified in Table 2 herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
Test Condition A, B, C or D using the circuit in E Package Drawing.
TA = 125°C, Min
Test Duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
5. Packing
5. 1 Packaging Requirements
The requirements for packaging shall be in accordance with MIL-M-38510.
DIGITAL-TO-ANALOG CONVERTERS
8-20 1
DlGlTAL-TO-ANALOG CONVERTERS
