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ADP3418ADIN/a2127avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418ADI ?N/a1773avaiDual Boostrapped 12 V MOSFET Driver with Output Disable
ADP3418ADN/a13avaiDual Boostrapped 12 V MOSFET Driver with Output Disable


ADP3418 ,Dual Boostrapped 12 V MOSFET Driver with Output DisableSpecifications subject to change without notice.ABSOLUTE MAXIMUM RATINGS* PIN CONFIGURATIONVCC .... ..
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ADP3418
Dual Boostrapped 12 V MOSFET Driver with Output Disable
aREV. PrC 7/3/02
Dual Boostrapped 12 V MOSFET
Driver with Output Disable
PRELIMINARY TECHNICAL DATA
FEATURES
All-In-One Synchronous Buck Driver
Bootstrapped High-Side Drive
One PWM Signal Generates Both Drives
Anticross-Conduction Protection Circuitry
Output Disable Control Turns Off both MOSFETs to
Float Output per Intel VRM 10 Specification
APPLICATIONS
Multiphase Desktop CPU Supplies
Single-Supply Synchronous Buck Converters
GENERAL DESCRIPTION

The ADP3418 is a dual high-voltage MOSFET driver
optimized for driving two N-channel MOSFETs which
are the two switches in a non-isolated synchronous buck
power converter. Each of the drivers is capable of driving
a 3000 pF load with a 20 ns propagation delay and a 30 ns
transition time. One of the drivers can be bootstrapped,
and is designed to handle the high-voltage slew rate asso-
ciated with floating high-side gate drivers. The ADP3418
includes overlapping drive protection (ODP) to prevent
shoot-through current in the external MOSFETs. The
OD pin shuts off both the high-side and the low-side
MOSFETs to prevent rapid output capacitor discharge
during system shutdown.
The ADP3418 is specified over the commercial tempera-
ture range of 0°C to 85°C and is available in a thermally-
enhanced 8-lead SOIC package.
FUNCTIONAL BLOCK DIAGRAM

Figure 1. General Application Circuit.
VCC
BST
DRVH
DRVL
PGND
ADP3418–SPECIFICATIONS1(VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to +85°C, unless otherwise noted)
PRELIMINARY TECHNICAL DATA

HIGH-SIDE DRIVER
LOW-SIDE DRIVER
NOTESAll limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).AC specifications are guaranteed by characterization, but not production tested.For propagation delays, “tpdh” refers to the specified signal going high; “tpdl” refers to it going low.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*

VCC.............................................................–0.3 V to 15 V
BST.............................................................–0.3 V to 30 V
BST to SW.................................................–0.3 V to 15 V...................................................................–5 V to 25 V
All Other Inputs and Outputs......–0.3 V to VCC + 0.3 V
Operating Ambient Temperature Range.....0°C to +85°C
Operating Junction Temperature Range...0°C to +125°C
Storage Temperature Range...................–65°C to +150°C
θJA..........................................................................123°C/W
Lead Temperature (Soldering, 10 sec).................+300°C
Vapor Phase (60 sec)..............................................+215°C
Infrared (15 sec).....................................................+220°C
*This is a stress rating only; operation beyond these limits can cause the device to be
permanently damaged. Unless otherwise specified, all voltages are referenced to
PGND
ORDERING GUIDE
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
PIN CONFIGURATION
R-8
PRELIMINARY TECHNICAL DATA
PIN FUNCTION DESCRIPTIONS

Figure 2. Output Disable Timing Diagram
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
ADP3418
PRELIMINARY TECHNICAL DATA
8-Lead SOIC
R-8
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