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ADE7755ADN/a329avaiSingle Phase Energy Metering IC with Synchronized Pulse Output


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ADE7755
Single Phase Energy Metering IC with Synchronized Pulse Output
REV. 0
Energy Metering IC
with Pulse Output
FUNCTIONAL BLOCK DIAGRAM
AC/DC
CLKOUT
V1P
V1N
V2PAVDDDVDD
CLKINREFIN/OUTF1F2CFREVPSCFS0S1
RESET
AGNDDGND
V2N
FEATURES
High Accuracy, Surpasses 50Hz/60 Hz IEC 687/1036
Less than 0.1% Error over a Dynamic Range of
500 to 1
The ADE7755 Supplies Average Real Power on the
Frequency Outputs F1 and F2
The High-Frequency Output CF Is Intended for
Calibration and Supplies Instantaneous Real Power
Pin Compatible with AD7755 with Synchronous CF and
F1/F2 Outputs
The Logic Output REVP Can Be Used to Indicate a
Potential Miswiring or Negative Power
Direct Drive for Electromechanical Counters and
Two Phase Stepper Motors (F1 and F2)
A PGA in the Current Channel Allows the Use of Small
Values of Shunt and Burden Resistance
Proprietary ADCs and DSP Provide High Accuracy over
Large Variations in Environmental Conditions and
Time
On-Chip Power Supply Monitoring
On-Chip Creep Protection (No Load Threshold)
On-Chip Reference 2.5 V � 8% (30 ppm/�C Typical)
with External Overdrive Capability
Single 5 V Supply, Low Power (15 mW Typical)
Low Cost CMOS Process

*U.S. Patents 5,745,323, 5,760,617, 5,862,069, and 5,872,469.
GENERAL DESCRIPTION

The ADE7755 is pin compatible with the AD7755. The only
difference between the ADE7755 and the AD7755 is that the
ADE7755 features a synchronous CF and F1/F2 outputs under
all load conditions.
The ADE7755 is a high accuracy electrical energy measurement
IC. The part specifications surpass the accuracy requirements as
quoted in the IEC1036 standard. See Analog Devices’ Appli-
cation Note AN-559 for a description of an IEC1036 watt-hour
meter reference design based on the AD7755.
The only analog circuitry used in the ADE7755 is in the ADCs
and reference circuit. All other signal processing (e.g., multipli-
cation and filtering) is carried out in the digital domain. This
approach provides superior stability and accuracy over extremes
in environmental conditions and over time.
The ADE7755 supplies average real power information on the
low-frequency outputs F1 and F2. These logic outputs may be
used to directly drive an electromechanical counter or interface
to an MCU. The CF logic output gives instantaneous real power
information. This output is intended to be used for calibration
purposes or for interfacing to an MCU.
The ADE7755 includes a power supply monitoring circuit on the
AVDD supply pin. The ADE7755 will remain in a reset condition
until the supply voltage on AVDD reaches 4V. If the supply falls
below 4V, the ADE7755 will also be reset and no pulses will be
issued on F1, F2, and CF.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched whether the HPF in Chan-
nel 1 is on or off. An internal no-load threshold ensures that the
ADE7755 does not exhibit any creep when there is no load.
The ADE7755 is available in a 24-lead SSOP package.
ADE7755–SPECIFICATIONS
(AVDD = DVDD = 5 V � 5%, AGND = DGND = 0 V, On-Chip Reference,
CLKIN = 3.58MHz, TMIN to TMAX = –40�C to +85�C.)

REFERENCE INPUT
CLKIN
LOGIC OUTPUTS
ADE7755
NOTESSee Terminology section for explanation of specifications.See Plots in Typical Performance Graphs.Sample tested during initial release and after any redesign or process change that may affect this parameter.
Specifications subject to change without notice.
TIMING CHARACTERISTICS1, 2

NOTESSample tested during initial release and after any redesign or process change that may affect this parameter.See Figure 1.The pulsewidths of F1, F2, and CF are not fixed for higher output frequencies. See Frequency Outputs section.The CF pulse is always 18 ms in the high-frequency mode. See Frequency Outputs section and Table IV.
Specifications subject to change without notice.
(AVDD = DVDD = 5 V � 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN = 3.58 MHz, TMIN to
TMAX = –40�C to +85�C.)
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
ABSOLUTE MAXIMUM RATINGS*

(TA = 25∞C unless otherwise noted.)
AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +7V
DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +7V
DVDD to AVDD . . . . . . . . . . . . . . . . . . . . . . –0.3V to +0.3V
Analog Input Voltage to AGND
V1P, V1N, V2P, and V2N . . . . . . . . . . . . . . . –6 V to +6 V
Reference Input Voltage to AGND . . –0.3 V to AVDD + 0.3V
Digital Input Voltage to DGND . . . –0.3 V to DVDD + 0.3 V
Digital Output Voltage to DGND . . –0.3 V to DVDD + 0.3 V
Operating Temperature Range
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
Storage Temperature Range . . . . . . . . . . . . –65∞C to +150∞C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150∞C
24-Lead SSOP, Power Dissipation . . . . . . . . . . . . . . 450 mWqJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 112∞C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215∞C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . .220∞C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
ADE7755
Figure 1.Timing Diagram for Frequency Outputs
PIN CONFIGURATION
PIN FUNCTION DESCRIPTIONS
3AVDD
ADE7755
TERMINOLOGY
MEASUREMENT ERROR

The error associated with the energy measurement made by the
ADE7755 is defined by the following formula:
PHASE ERROR BETWEEN CHANNELS

The HPF (High-Pass Filter) in Channel 1 has a phase lead
response. To offset this phase response and equalize the phase
response between channels, a phase correction network is also
placed in Channel 1. The phase correction network matches the
phase to within ±0.1∞ over a range of 45 Hz to 65 Hz and ±0.2∞
over a range 40 Hz to 1 kHz. See Figures 4 and 5.
POWER SUPPLY REJECTION

This quantifies the ADE7755 measurement error as a percent-
age of the reading when the power supplies are varied.
For the ac PSR measurement, a reading at nominal supplies
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supplies and a second reading obtained under the same
input signal levels. Any error introduced is expressed as a
percentage of the reading (see Measurement Error definition).
For the dc PSR measurement, a reading at nominal supplies
(5 V) is taken. The supplies are then varied ±5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of the reading.
ADC OFFSET ERROR

This refers to the dc offset associated with the analog inputs to
the ADCs. It means that with the analog inputs connected to
AGND, the ADCs still see a small dc signal (offset). The offset
decreases with increasing gain in Channel V1. This specification
is measured at a gain of 1. At a gain of 16, the dc offset is typi-
cally less than 1 mV. However, when the HPF is switched on,
the offset is removed from the current channel and the power
calculation is not affected by this offset.
GAIN ERROR

The gain error of the ADE7755 is defined as the difference between
the measured output frequency (minus the offset) and the ideal
output frequency. It is measured with a gain of 1 in Channel V1.
The difference is expressed as a percentage of the ideal frequency.
The ideal frequency is obtained from the ADE7755 transfer
function (see Transfer Function section).
GAIN ERROR MATCH

The gain error match is defined as the gain error (minus the off-
set) obtained when switching between a gain of 1 and a gain of 2,
8, or 16. It is expressed as a percentage of the output frequency
obtained under a gain of 1. This gives the gain error observed
when the gain selection is changed from 1 to 2, 8, or 16.
Amps
–0.50.010.1
% ERROR
–0.4
–0.3
–0.2
–0.1
0.510100

TPC 1.Error as a % of Reading (Gain = 1)
Amps
–0.5
% ERROR
–0.4
–0.3
–0.2
–0.1
0.510100

TPC 2.Error as a % of Reading (Gain = 2)
Amps
–0.40.010.1
% ERROR
–0.3
–0.2
–0.1
0.610100

TPC 3.Error as a % of Reading (Gain = 8)
TPC 4.Error as a % of Reading (Gain = 16)
Amps
–0.6
% ERROR
–0.4
–0.2
0.610100

TPC 5.Error as a % of Reading (Gain = 1)
Amps
–0.6
% ERROR
–0.4
–0.2
0.610100

TPC 6.Error as a % of Reading (Gain = 2)
ADE7755
Amps
% ERROR
–0.8
–0.6
–0.4
–0.2

TPC 7.Error as a % of Reading (Gain = 8)
Amps
% ERROR
–0.8
–0.6
–0.2
–0.4
–1.0

TPC 8.Error as a % of Reading (Gain = 16)
Amps
–0.4
% ERROR
–0.2
–0.1
–0.3
0.3

TPC 9.Error as a % of Reading over Temperature
Amps
% ERROR
–0.4
–0.3
–0.2
–0.1
0.410100

TPC 10.Error as a % of Reading over Temperature
with an External Reference (Gain = 16)
FREQUENCY – Hz
% ERROR
–0.2
–0.4
–0.6505560657075

TPC 11.Error as a % of Reading over Frequency
TPC 12.Test Circuit for Performance Curves
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