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AD9943KCPADN/a4371avaiComplete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors
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AD9943KCP ,Complete 10-Bit and 12-Bit, 25 MHz CCD Signal ProcessorsFeatures Section...... 1 Updated Ordering Guide.. 5 Replaced TPC 3 9 Added Figure 12...... 15 Updat ..
AD9943KCPZ ,Complete 10-Bit and 12-Bit, 25 MHz CCD Signal ProcessorsAPPLICATIONS adjustment, black level adjustment, input clock polarity, and Digital still cameras po ..
AD9943KCPZ ,Complete 10-Bit and 12-Bit, 25 MHz CCD Signal ProcessorsCharacteristics ........ 7 Variable Gain Amplifier ...... 16 ESD Caution. 7 CCD Mode Timing 17 AD9 ..
AD9943KCPZ ,Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processorsapplications. They feature a 25 MHz single-channel Low noise optical black clamp circuit architectu ..
AD9943KCPZRL ,Complete 10-Bit and 12-Bit, 25 MHz CCD Signal ProcessorsSPECIFICATIONS T to T , AVDD = DVDD = DRVDD = 3 V, f = 25 MHz, unless otherwise noted. MIN MAX SAMP ..
AD9944KCP ,Complete 10-Bit and 12-Bit, 25 MHz CCD Signal ProcessorsSpecifications subject to change without notice. No license is granted by implication www.analog.c ..
ADSP-2163 ,DSP Microcomputers With ROMOVERVIEW . . . . . . . . . . . . . . . . . . . . 3TIMING NOTES . . . . . . . . . . . . . . . . . . ..
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ADSP-2164 ,DSP Microcomputers With ROMaDSP Microcomputers with ROMADSP-216xSUMMARY FUNCTIONAL BLOCK DIAGRAM16-Bit Fixed-Point DSP Micropr ..
ADSP-2166 ,DSP Microcomputers With ROMOVERVIEWDevelopment ToolsFigure 1 shows a block diagram of the ADSP-216x architecture.The ADSP-216x ..
ADSP-2171BST-133 ,DSP Microcomputeroverview of ADSP-217xof tools for software and hardware system development, supports functionality. ..
ADSP-2171KS133 ,DSP Microcomputerapplications. The• receive and transmit data through the two serial portsADSP-2172 also has 8K word ..


AD9943KCP-AD9943KCPZ-AD9943KCPZRL-AD9944KCP-AD9944KCPRL-AD9944KCPZ
Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors
Complete 10-Bit and 12-Bit, 25 MHz
CCD Signal Processors

Rev. B
FEATURES
25 MSPS correlated double sampler (CDS)
6 dB to 40 dB 10-bit variable gain amplifier (VGA)
Low noise optical black clamp circuit
Preblanking function
10-bit (AD9943), 12-bit (AD9944) 25 MSPS A/D converter
No missing codes guaranteed
3-wire serial digital interface
3 V single-supply operation
Space-saving 32-lead 5 mm × 5 mm LFCSP package
APPLICATIONS
Digital still cameras
Digital video camcorders
PC cameras
Portable CCD imaging devices
CCTV cameras
GENERAL DESCRIPTION

The AD9943/AD9944 are complete analog signal processors
for CCD applications. They feature a 25 MHz single-channel
architecture designed to sample and condition the outputs of
interlaced and progressive scan area CCD arrays. The signal
chain for the AD9943/AD9944 consists of a correlated double
sampler (CDS), a digitally controlled variable gain amplifier
(VGA), and a black level clamp. The AD9943 offers 10-bit
ADC resolution, while the AD9944 contains a true 12-bit ADC.
The internal registers are programmed through a 3-wire
serial digital interface. Programmable features include gain
adjustment, black level adjustment, input clock polarity, and
power-down modes. The AD9943/AD9944 operate from a
single 3 V power supply, typically dissipate 79 mW, and are
packaged in space-saving 32-lead LFCSP packages.
FUNCTIONAL BLOCK DIAGRAM
DATACLKSHDSHP
DOUTCCDIN
PBLKREFTREFB
AVDD
DVDD
DVSS
AVSS
DRVDD
DRVSS
SDATASCKSL
CLPOB

02905-B
Figure 1. Functional Block Diagram
TABLE OF CONTENTS
AD9943/AD9944 Specifications.....................................................3
General Specifications.................................................................3
Digital Specifications...................................................................3
AD9943 System Specifications.......................................................4
AD9944 System Specifications.......................................................5
Timing Specifications.......................................................................6
Absolute Maximum Ratings............................................................7
Thermal Characteristics..............................................................7
ESD Caution..................................................................................7
AD9943 Pin Configuration and Function Descriptions.............8
AD9944 Pin Configuration and Function Descriptions.............9
Terminology....................................................................................10
Equivalent Input Circuits..............................................................11
Typical Performance Characteristics...........................................12
Internal Register Map....................................................................13
Serial Interface................................................................................14
Circuit Description and Operation..............................................15
DC Restore..................................................................................15
Correlated Double Sampler......................................................15
Optical Black Clamp..................................................................15
A/D Converter............................................................................16
Variable Gain Amplifier............................................................16
CCD Mode Timing........................................................................17
Applications Information..............................................................18
Internal Power-On Reset Circuitry..........................................19
Grounding and Decoupling Recommendations....................19
Outline Dimensions.......................................................................20
Ordering Guide..........................................................................20
REVISION HISTORY
5/04—Data Sheet Changed from Rev. A to Rev. B

Updated Format..................................................................Universal
Updated Outline Dimensions.......................................................20
Changes to Ordering Guide..........................................................20
5/03—Data Sheet changed from Rev. 0 to Rev. A

Added AD9944....................................................................Universal
Changes to Features Section............................................................1
Updated Ordering Guide.................................................................5
Replaced TPC 3.................................................................................9
Added Figure 12..............................................................................15
Updated Outline Dimensions.......................................................16
AD9943/AD9944 SPECIFICATIONS
GENERAL SPECIFICATIONS

TMIN to TMAX, AVDD = DVDD = DRVDD = 3 V, fSAMP = 25 MHz, unless otherwise noted.
Table 1.

DIGITAL SPECIFICATIONS

DRVDD = DVDD = 2.7 V, CL = 20 pF, unless otherwise noted.
Table 2.

AD9943 SYSTEM SPECIFICATIONS
TMIN to TMAX, AVDD = DVDD = DRVDD = 3 V, fSAMP = 25 MHz, unless otherwise noted.
Table 3.


1 Input signal characteristics defined as follows: OPTICAL BLACK PIXEL
500mV TYP
RESET TRANSIENT
1V TYP
INPUT SIGNAL RANGE
02905-B
-002
AD9944 SYSTEM SPECIFICATIONS
TMIN to TMAX, AVDD = DVDD = DRVDD = 3 V, fSAMP = 25 MHz, unless otherwise noted.
Table 4.


1 Input signal characteristics defined as follows:
OPTICAL BLACK PIXEL
500mV TYP
RESET TRANSIENT
1V TYP
INPUT SIGNAL RANGE
02905-B
-002
TIMING SPECIFICATIONS
CL = 20 pF, fSAMP = 25 MHz. See CCD-mode timing in Figure 14 and Figure 15, and serial timing in Figure 10 and Figure 11.
Table 5.

Minimum CLPOB pulse width is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp performance.
ABSOLUTE MAXIMUM RATINGS
Table 6.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS

The thermal resistance of a 32-Lead LFCSP package
(with the exposed bottom pad soldered to the board GND)
is θJA = 27.7°C/W.
ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
AD9943 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1INDICATOR
TOP VIEW
24 REFB
23 REFT
22 CCDIN
21 AVSS
D0 1
D1 2
D2 3
32 N
20 AVDD
19 SHD
18 SHP
17 CLPOB
D8 9D9
1
DRV
DD 1
VSS 12
DD 1
DATACLK 1
VSS 15
16
D3 4
D4 5
D5 6
D6 7
D7 8
31 N
30 N
29 N
28 N
27 SC
25 SL
AD9943
NC = NO CONNECT
02905-B
Figure 2. AD9943 Pin Configuration
Table 7. AD9943 Pin Function Descriptions


1 Type: AI = analog input, AO = analog output, DI = digital input, DO = digital output, P = power, and NC = no connect.
AD9944 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1INDICATOR
TOP VIEW
24 REFB
23 REFT
22 CCDIN
21 AVSS
D2 1
D3 2
D4 3
32 D
20 AVDD
19 SHD
18 SHP
17 CLPOB
10 9
11 10
DRV
DD 1
VSS 12
DD 1
DATACLK 1
VSS 15
16
D5 4
D6 5
D7 6
D8 7
D9 8
31 D
30 N
29 N
28 N
27 SC
25 SL
AD9944
NC = NO CONNECT
02905-B
Figure 3. AD9944 Pin Configuration
Table 8. AD9944 Pin Function Descriptions

Type: AI = analog input, AO = analog output, DI = digital input, DO = digital output, P = power, and NC = no connect.
TERMINOLOGY
Differential Nonlinearity (DNL)

An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Therefore
every code must have a finite width. No missing codes
guaranteed to 10-bit resolution indicates that all 1024 codes,
respectively, must be present over all operating conditions.
Peak Nonlinearity

Peak nonlinearity, a full-signal chain specification, refers to the
peak deviation of the output of the AD9943/AD9944 from a
true straight line. The point used as zero scale occurs 1/2 LSB
before the first code transition. Positive full scale is defined as a
level 1 1/2 LSB beyond the last code transition. The deviation is
measured from the middle of each particular output code to the
true straight line. The error is then expressed as a percentage of
the 2 V ADC full-scale signal. The input signal is always
appropriately gained up to fill the ADC’s full-scale range.
Total Output Noise

The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated
in LSB and represents the rms noise level of the total signal
chain at the specified gain setting. The output noise can be
converted to an equivalent voltage, using the relationship codesScaleFullADCNLSB1=
where N is the bit resolution of the ADC. For example, 1 LSB of
the AD9943 is 1.95 mV.
Power Supply Rejection (PSR)

The PSR is measured with a step change applied to the supply
pins. This represents a very high frequency disturbance on the
AD9943/AD9944’s power supply. The PSR specification is
calculated from the change in the data outputs for a given
step change in the supply voltage.
Internal Delay for SHP/SHD

The internal delay (also called aperture delay) is the time delay
that occurs from the time a sampling edge is applied to the
AD9943/AD9944 until the actual sample of the input signal is
held. Both SHP and SHD sample the input signal during the
transition from low to high, so the internal delay is measured
from each clock’s rising edge to the instant the actual internal
sample is taken.
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