AD9806KSTRL ,Complete 10-Bit 18 MSPS CCD Signal ProcessorSPECIFICATIONS(T to T , AVDD = DVDD = 3.0 V, f = f = f = 18 MHz, unless otherwise noted.)MIN MAX AD ..
AD9806KSTZ ,Complete 10-Bit 18 MSPS CCD Signal ProcessorSPECIFICATIONS (T to T , AVDD = DVDD = 3.0 V, f = 18 MHz, unless otherwise noted.)MIN MAX ADCCLKPar ..
AD9807JS ,Complete 12-Bit/10-Bit 6 MSPS CCD/CIS Signal ProcessorsSPECIFICATIONS PGA Gain = 1 unless otherwise noted)Parameter Min Typ Max UnitsRESOLUTION 10 BitsCO ..
AD9814JR ,Complete 14-Bit CCD/CIS Signal Processorfeatures a 3-channel architecture de-3-Channel Operation Up to 10 MSPS signed to sample and conditi ..
AD9814JR ,Complete 14-Bit CCD/CIS Signal ProcessorSpecifications.2The Gain Error specification is dominated by the tolerance of the internal differen ..
AD9814JRRL ,Low Power 14-Bit, 3-Channel CCD Signal Processor with Progammable Serial Interface and Byte-Wide Data Output FormatSPECIFICATIONS (T to T , AVDD = +5 V, DRVDD = +5 V, 3-Channel CDS Mode, f = 6 MHz, f = f =MIN MAX A ..
ADS8556IPMR ,630kSPS, 6-Channels, Simultaneous Sampling Analog-to-Digital Converter 64-LQFP -40 to 125Features 2 Applications1• Family of 16-, 14-, 12-Bit, Pin- and • Power Quality MeasurementSoftware- ..
ADS8557IPM ,670kSPS, 14-Bit, 6-Channels, Simultaneous Sampling Analog-to-Digital Converter 64-LQFP -40 to 125Electrical Characteristics tables..... 8• Added text reference for Figure 42 ........ 32• Changed F ..
ADS8557IPM ,670kSPS, 14-Bit, 6-Channels, Simultaneous Sampling Analog-to-Digital Converter 64-LQFP -40 to 125Features 2 Applications1• Family of 16-, 14-, 12-Bit, Pin- and • Power Quality MeasurementSoftware- ..
ADS8558IPM ,730kSPS, 12-Bit, 6-Channels, Simultaneous Sampling Analog-to-Digital Converter 64-LQFP -40 to 125Features 2 Applications1• Family of 16-, 14-, 12-Bit, Pin- and • Power Quality MeasurementSoftware- ..
ADS8558IPM ,730kSPS, 12-Bit, 6-Channels, Simultaneous Sampling Analog-to-Digital Converter 64-LQFP -40 to 125Electrical Characteristics tables..... 8• Added text reference for Figure 42 ........ 32• Changed F ..
ADS900 ,10-Bit, 20MHz, +3V Supply ANALOG-TO-DIGITAL CONVERTERADS900EADS900SBAS058A – MAY 2001 10-Bit, 20MHz, +3V Supply TM ANALOG-TO-DIG ..
AD9806KSTRL-AD9806KSTZ
Complete 10-Bit 18 MSPS CCD Signal Processor
REV.0
Complete 10-Bit 18 MSPS
CCD Signal Processor
FUNCTIONAL BLOCK DIAGRAM
PBLKCLPOB
3-W INTFADCINAUXINSHPSHDADCCLK
DOUT
VRT
VRB
CCDIN
DAC1
DAC2
CLPDM
AUXMID
FEATURES
Pin-Compatible with Industry Standard AD9803
18 MSPS Correlated Double Sampler (CDS)
Low Noise PGA with 0 dB to 34 dB Gain Range
Low Noise Clamp Circuits
Analog Preblanking Function
10-Bit 18 MSPS A/D Converter
AUX Input with Input Clamp and PGA
Direct ADC Input with Input Clamp
AUXMID Input with PGA
3-Wire Serial Interface for Digital Control
Two Auxiliary 8-Bit DACs
3 V Single Supply Operation
Low Power: 65 mW @ 2.7 V Supply
48-Lead LQFP Package
APPLICATIONS
Camcorders (8 mm and DVC)
Digital Still Cameras
PRODUCT DESCRIPTIONThe AD9806 is a complete analog signal processor for CCD
applications. It features an 18 MHz single-channel architecture
designed to sample and condition the outputs of interlaced and
progressive scan area CCD arrays. The AD9806’s signal chain
consists of an input clamp, correlated double sampler (CDS),
digitally programmable gain amplifier (PGA), black level clamp,
and 10-bit A/D converter. Additional input modes are provided
for processing analog video signals.
The internal registers are programmed through a 3-wire serial
digital interface. Programmable features include gain adjust-
ment, black level adjustment, input configuration, and power-
down modes.
The AD9806 operates from a single 3 V power supply, typically
dissipating 75 mW. Packaged in a space-saving 48-lead LQFP,
the AD9806 is specified over an operating temperature range of
–20°C to +85 C.
AD9806–SPECIFICATIONS
GENERAL SPECIFICATIONSSpecifications subject to change without notice.
DIGITAL SPECIFICATIONSSpecifications subject to change without notice.
(TMIN to TMAX, AVDD = DVDD = 3.0 V, fADCCLK = 18 MHz, unless otherwise noted.)
(DRVDD = 2.7 V, CL = 20 pF.)
AD9806
CCD-MODE SPECIFICATIONSTIMING SPECIFICATIONS
NOTESInput signal characteristics defined as follows:
Use equations on page 8 to calculate gain.SNR = 20 log10 (Full-Scale Voltage/RMS Output Noise).20 pF loading; timing shown in Figure 1.Internal aperture delay for actual sampling edge.
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = DVDD = 3.0 V, fADCCLK = fSHP = fSHD = 18 MHz, unless otherwise noted.)
AD9806–SPECIFICATIONS
AUX-MODE SPECIFICATIONSACTIVE CLAMP
TIMING SPECIFICATIONS
NOTES20 pF loading; timing shown in Figure 2.
Specifications subject to change without notice.
AUXMID-MODE SPECIFICATIONSNOTES20 pF loading; timing shown in Figure 2.
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = DVDD = 3.0 V, fADCCLK = 18 MHz, unless otherwise noted.)
(TMIN to TMAX, AVDD = DVDD = 3.0 V, fADCCLK = 18 MHz, unless otherwise noted.)
AD9806ADC-MODE SPECIFICATIONSSpecifications subject to change without notice.
DAC SPECIFICATIONS (DAC1 and DAC2)Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
ORDERING GUIDE
THERMAL CHARACTERISTICS
Thermal Resistance48-Lead LQFP Package
θJA = 92°C
(TMIN to TMAX, AVDD = DVDD = 3.0 V, fADCCLK = 18 MHz, unless otherwise noted.)
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9806 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
AD9806
PIN CONFIGURATION
DVDD
DVSS
ADCCLK
STBY
(LSB) D0
(MSB) D9
DRVDD
PBLK
CLPOB
SHP
SHD
ADCIN
AUXMID
AUXIN
ACVDD
CLPBYP
ACVSS
CLPREF
CCDIN
CLPOUT
VRTVRBSUBSTADVSSSDATA
ADVDD
SCKSL
DAC2
DAC1NCCMLEVEL
CLPDMDRVSS
NC = NO CONNECT
PIN FUNCTION DESCRIPTIONS
