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AD9768JDADIN/a1avaiUltrahigh Speed IC D/A Converter
AD9768SDADN/a250avaiUltrahigh Speed IC D/A Converter


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AD9768JD-AD9768SD
Ultrahigh Speed IC D/A Converter
FUNCTIONAL BLOCK DIAGRAM
REV.AUltrahigh Speed IC
D/A Converter
FEATURES
5 ns Settling Time
100 MSPS Update Rate
20 mA Output Current
ECL-Compatible
40 MHz Multiplying Mode
APPLICATIONS
Raster Scan & Vector Graphic Displays
High Speed Waveform Generation
Digital VCOs
Ultrafast Digital Attenuators
GENERAL DESCRIPTION

The Analog Devices AD9768SD D/A converter is a monolithic
current-output converter which can accept 8 bits of ECL-level
digital input voltages and convert them into analog signals at
update rates as high as 100 MSPS. In addition to its use as a
standard D/A converter, it can also be utilized as a two-quadrant
multiplying D/A at multiplying bandwidths as high as 40 MHz.
An inherently low glitch design is used, and the complementary
current outputs are suitable for driving transmission lines
directly. Nominal full-scale output is 20 mA, which corresponds
to a 1 volt drop across a 50 Ω load, or ±1 volt across 100 Ω
returned to +1 volt. The actual output current is determined by
the on-chip reference voltage (VREF < –1.26 V) and an external
current setting resistor, RSET.
Full-scale output current IOUT with digital “1” at all inputs is
calculated with the equation:
IOUT=4×VRET±VREF
RSET
The setting resistor RSET and the output load resistor should
both have low temperature coefficients. A complementaryIOUT is also provided.
AD9768JD/SD PIN CONNECTIONS

The reference voltage source is a modified bandgap type
and is nominally –1.26 volts. This reference supply requires
no external regulation. To reduce the possibility of noise
generation and/or instability, Pin 15 (REFERENCE OUT)
can be decoupled using a high-quality ceramic chip
capacitor. Stabilization of the internal loop amplifier is by a
single capacitor connected from Pin 17 (COMPENSATION)
to ground. The minimum value for this capacitor is 3900 pF,
although a 0.01 μF ceramic chip capacitor is recommended.
The incredible speed characteristics of the AD9768SD D/A
converter make it attractive for a wide range of high speed
applications. The ability of the unit to operate as a two-
quadrant multiplying D/A converter adds another dimen-
sion to its usefulness and makes the AD9768SD a truly
versatile device.
AD9768SE PIN CONNECTIONS
AD9768–SPECIFICATIONS
(typical @ +258C under following conditions unless otherwise noted; nominal digital
input levels; nominal power supplies; RL = 50 V; RSET = 220 V; VRET = 0 V)

AD9768SD D/A Schematic
ParameterUnitAD9768SJD/SD/SE

RESOLUTION(FS = FULL SCALE)Bits8
LSB WEIGHT (CURRENT)μA78
ACCURACY1
Differential Nonlinearity± % FS0.2
Integral Nonlinearity± % FS0.2
MonotonicityGuaranteed
Zero Offset (lnitial)μA60
TEMPERATURE COEFFICIENTS
Zero Offsetppm/°C1.5
Reference Voltage (–1.26 V)ppm/°C70
DIGITAL DATA INPUTS
Logic CompatibilityECL
Logic Voltage Levels “l” =V–0.9
“0” =V–1.7
CodingBinary (BIN) = Unipolar Out
Offset Binary (OBN) = Bipolar Out
OUTPUT
Current (Unipolar) FSmA (max)2 to 20 (30)
IOUT (@ Pin 13)
All Digital “1” InputmA20
All Digital “0” InputmA0
IOUT(@ Pin 14)
All Digital “l” InputmA0
All Digital “0” InputmA20
ComplianceV (Pin 13)–0.7 to +3.0
V (Pin 14)–1.1 to +3.0
ImpedanceΩ (±15%)750
SPEED PERFORMANCE
Settling Time (to 0.2% FS)2ns5
Slew RateV/μs400
Update RateMSPS100
Rise Timens1.8
Glitch EnergypV-sec200
REFERENCE
Internal, Monolithic3V–1.26
External, Variable4
Voltage-Multiplying ModeV (max)0 to –1.1 (–2)
Current-Multiplying ModemA (max)0 to –5 (–7.5 )
VOLTAGE-MULTIPLYING MODE4 (See Figure 2)
VM Range (at Pin 16)V±0.5
VM CenterV–0.6
Resistance (at Pin 16)kΩ800
Transfer Function – Measured at Pin 13; Digital “0” Applied
to Bits 1-8:
–0.1 VM Input = 0 mA IOUT
–1.1 VM Input = 0 mA IOUT
Measured at Pin 13; Digital “1” Applied
to Bits 1-8:
–0.1 VM Input = 1 mA IOUT
–1.1 VM Input = 20 mA IOUT
Large Signal Bandwidth (–3 dB Point)kHz250
ParameterUnitAD9768SJD/SD/SE

CURRENT-MULTIPLYING MODE
(See Figure 4)
IM Range (at Pins 17 & 18)mA0 to 5
Resistance (at Pin 18)Ω160
Transfer Function – Measured at Pin 13; Digital “0” Applied
to Bits 1-8:
1 mA IM Input = 0 mA IOUT
5 mA IM Input = 0 mA IOUT
Measured at Pin 13; Digital “1” Applied
to Bits 1-8:
1 mA IM Input = 4 mA IOUT
5 mA IM Input = 20 mA IOUT
Large Signal Bandwidth (–3dB Point)MHz40
POWER REQUIREMENTS
–5.2 V ±0.25mA (max)66(70)
+5.0 V ±0.25mA (max)14(15)
Power DissipationmW (max)410(430)
Power Supply Sensitivity5%/%0.07
TEMPERATURE RANGES6
Operating
AD9768JD°C0 to +70
AD9768SD/SE°C–55 to +125
Storage°C–55 to +150
THERMAL RESlSTANCE 7
Junction to Air, θJA (Free Air)°C/W90
Junction to Case, θJA°C/W20
PACKAGE OPTION8
Ceramic (D-18) AD9768JD
AD9768SD
LCC (E-20A) AD9768SE
NOTES
1Relative to FS, including linearity (within voltage compliance limits).
2Worst case settling time; includes FS and Most Significant Bit (MSB) transitions.
3Applies when operating AD9768 as standard D/A.
4Based on RL = 50 ohms; RSET = 220 ohms; VRET = 0 V.
51% change in either power supply voltage causes 0.07% change in analog output.
6Case temperature.
7Maximum junction temperature 125°C.
8D = Ceramic DIP, E = Leadless Ceramic Chip Carrier.
Specifications subject to change without notice.
speed, high performance device: optimum use requires careful
attention to all design details, including the layout of the circuit
in which the converter is used.
CONVENTIONAL AD9768SD

Refer to Figure 1, Conventional AD9768SD.
The output current of the AD9768 appears at Pin 13 (IO) and
develops a voltage across the load resistor RL which is based on:
A. IM (the current flowing through the single-transistor
source discussed above)
B. Value of RL
Figure 1. Conventional AD9768SD
IM is a function of the return voltage (VRET), the reference
voltage (VREF), and the value of RSET; all of these are selected by
the user for his application. The necessary equations for
calculating precise values for each are part of Figure 1. As
indicated, the voltage drop across RL is added to the return
voltage; the resulting voltage is the total VOUT of the converter.
VOLTAGE MULTIPLYING MODE

In addition to its use as an ultra-high speed current output D/A
converter, the AD9768 can also be used as a two-quadrant
multiplying D/A in either a voltage mode or a current mode.
Refer to Figure 2, Multiplying AD9768 (Voltage Mode).
When operating in this mode, the analog output of the AD9768
is influenced by the digital inputs and an external multiplying
voltage (VM) applied to Pin 16 REFERENCE IN, which takes
the place of the internal reference used when the D/A is
operating in a conventional manner.
Figure 2. Multiplying AD9768 (Voltage Mode)
The value of IM flowing through RSET is set by the voltage of
VRET minus the multiplying voltage (VM), divided by RSET; the
amount of this current is part of the equation which establishes
the analog output (VOUT) of the AD9768 and is chosen by the
THEORY OF OPERATION

Refer to the AD9768SD schematic.
The transistors pictured on the bottom of the diagram, con-
nected to paired transistors in the middle of the schematic, are
current sources which are always “on”. The paired transistors
are differential current switches, designed to steer current from
the current sources to either Pin 13 (IO) or Pin 14 ( IO).
Digital inputs applied to Pins 1-8 determine which transistors
will be operating in each pair and establish what current will
flow at Pins 13 and 14.
The transistor on the extreme left of the schematic is a base
reference for the paired current switches and is used to assure
the switches will be centered around an ECL voltage swing. The
diodes connected to the base of this transistor are temperature
compensation devices for the base reference circuit.
There are three different current sources in the AD9768 D/A.
The eight transistors shown on the bottom of the schematic are
structured as two identical groups of four current sources, each
of which is binarily weighted. The MSB group, comprised of the
four on the right, is connected to the LSB group through a 15:1
current divider made up of two 50 Ω and two 750 Ω resistor
networks. The geometry of the AD9768 guarantees the binary
weighing ratios among the 100, 200, 400 and 800 resistors in
each emitter circuit are correct.
The resistor values which are shown indicate the ratios among
the resistors, and not their nominal values.
The third current source is a single transistor, pictured in the
lower left portion of the schematic with its collector connected
to Pin 18 RSET. Its function is to help establish the base voltage
on the eight current sources; it works in conjunction with the
external RSET resistor selected by the user of the AD9768, and
the reference amplifier. Current flowing through this transistor
is referred to as IM in the figures and text.
When the AD9768 is operating as a conventional current-output
D/A converter, IM develops a voltage across RSET which is one of
the inputs to the on-board reference amplifier shown in the
schematic. The other input to this amplifier is the on-chip
reference voltage of –1.26 volts.
The output of the reference amplifier adjusts the current-source
base reference voltage at Pin 17; this, in turn, adjusts the value
of IM in the single-transistor current source and causes it to
develop a voltage across RSET which maintains Pin 18 at the
–1.26 volts of the on-chip reference supply.
To maintain good stability in the internal loop reference
amplifier, a ceramic chip capacitor with a nominal value of
0.01 μF should be connected to Pin 17 COMPENSATION;
minimum recommended value for this capacitor is 3900 pF.
The temperature coefficient of the load resistor (RL) can affect
the performance of the AD9768 D/A converter, as it can with
any current-output converter. The design and use of the
AD9768 and its dependence on an external RSET resistor, how-
ever, make it sensitive also to the tempco of RSET. The user is
cautioned to select RL and RSET resistors which have low tem-
perature coefficients.
AD9768
C753c–5–12/89
PRINTED IN U.S.A.
If the load resistor (RL) has a value of 50 ohms, if RSET has a
value of 220 ohms, and if VRET is 0 V, the center of the VM
voltage will be –0.6 V; and it can vary from –0.1 V to –1.1 V.
Typically, the frequency of these variations has an upper limit of
250 kHz when operating in the voltage multiplying mode; that
frequency is the 3 dB point of the bandwidth of the internal
reference amplifier.
The combined effects of variations in VM and changes in digital
input values are shown in Figure 3, IOUT vs. Multiplying Volt-
age. In this illustration, the ordinate of the graph is expressed in
terms of milliamps of IOUT current at Pin 13. VOUT, of course,
will be a function of the value of RL chosen by the user.
Figure 3.IOUT vs. Multiplying Voltage
The negative value of VM on the horizontal axis is shown start-
ing at approximately –0.1 V, rather than 0 V, because the
AD9768 must have some small value of voltage applied to per-
form a multiplying function. For the conditions shown in the
figure, output current starts to become nonlinear at approxi-
mately 20 mA because of the maximum 30 mA output drive
capabilities of the device. Different values for RSET and RL
would alter the point where limiting first appears.
CURRENT MULTIPLYING MODE

The AD9768 D/A converter can be operated at markedly higher
multiplying rates when operated in a current-multiplying mode,
as contrasted with the voltage multiplying mode. Refer to Figure
4, Multiplying AD9768SD (Current Mode).
Figure 4. Multiplying AD9768SD (Current Mode)
In this mode, the internal reference amplifier and its inherent
VIN is some voltage chosen by the user for his particular applica-
tion; the value of this voltage is based in part on the size of the
load resistor and the 0 mA to 5 mA range of IM. VIN can have
frequency components as high as 40 MHz. VADJ and RADJ pro-
vide an offset adjustment to compensate for the dc component
of VIN to assure IM is always a unipolar current between 0 mA
and 5 mA. The values of the required voltages and resistors can
be calculated using the equations which are part of Figure 4.
Refer to Figure 5, IOUT vs. Multiplying Current.
Figure 5. IOUT vs. Multiplying Current
As shown, IM can vary over the range of 0 mA to 5 mA; a value
of approximately 0.3 mA may be the practical lower limit because
of nonlinearities at extremely small current levels. These changes
in IM are combined with variations in digital inputs, producing
complex changes in the output current (at pin 13) and in VOUT.
The “rounding” of the current curve in the graph is the result of
IOUT approaching the 30 mA maximum drive capabilities of the
AD9768 and needs to be taken into account to assure optimum
performance in the selected application.
OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).
Ceramic (D-18)
LCC (E-20A)
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