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AD9214BRS-65 |AD9214BRS65ADIN/a63avai10-Bit, 65/80/105 MSPS 3 V A/D Converter
AD9214BRS-65 |AD9214BRS65ADN/a300avai10-Bit, 65/80/105 MSPS 3 V A/D Converter
AD9214BRS-80 |AD9214BRS80ANALOGN/a36avai10-Bit, 65/80/105 MSPS 3 V A/D Converter


AD9214BRS-65 ,10-Bit, 65/80/105 MSPS 3 V A/D ConverterAPPLICATIONSBattery-Powered InstrumentsAGND REF REFSENSE DGNDHand-Held ScopemetersLow-Cost Digital ..
AD9214BRS-65 ,10-Bit, 65/80/105 MSPS 3 V A/D ConverterFEATURES FUNCTIONAL BLOCK DIAGRAMSNR = 57 dB @ 39 MHz Analog Input (–0.5 dBFS)AV PWRDWN DrVLow Powe ..
AD9214BRS-80 ,10-Bit, 65/80/105 MSPS 3 V A/D ConverterSPECIFICATIONS frequency used, unless otherwise noted.)Test AD9214-65 AD9214-80 AD9214-105Parameter ..
AD9215BCP-105 ,10-Bit, 65/80/105 MSPS, 3V A/D ConverterFEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDDSingle 3 V supply operation (2.7 V to 3.3 V) SNR = 58 d ..
AD9215BCP-65 ,10-Bit, 65/80/105 MSPS, 3V A/D Converterapplications in communications, imag-4. The AD9215 is part of several pin compatible 10-, 12-, and ..
AD9215BCP-80 ,10-Bit, 65/80/105 MSPS, 3V A/D ConverterSpecifications 2 Applying the AD9215 Theory of Operation.... 14 Changes to Figure 2. 4 Clock Input ..
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ADS774JP ,Microprocessor-Compatible Sampling CMOS ANALOG-to-DIGITAL CONVERTERThree-State BuffersADS774ADS774ADS774®ADS774Microprocessor-Compatible SamplingCMOS ANALOG-to-DIGITA ..
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ADS774KE ,Brown Corporation - Microprocessor-Compatible Sampling CMOS ANALOG-to-DIGITAL CONVERTER


AD9214BRS-65-AD9214BRS-80
10-Bit, 65/80/105 MSPS 3 V A/D Converter
REV.D
10-Bit, 65/80/105 MSPS
3 V A/D Converter
FUNCTIONAL BLOCK DIAGRAM
AGND
AVDDDrVDDPWRDWN
D9–D0
DGND
ENCODE
AIN
AIN
DFS/GAIN
REFSENSEREF
FEATURES
SNR = 57 dB @ 39 MHz Analog Input (–0.5 dBFS)
Low Power
190 mW at 65 MSPS
285 mW at 105 MSPS
30 mW Power-Down Mode
300 MHz Analog Bandwidth
On-Chip Reference and Track/Hold
1 V p-p or 2 V p-p Analog Input Range Option
Single 3.3 V Supply Operation (2.7 V–3.6 V)
Two’s Complement or Offset Binary Data Format Option
APPLICATIONS
Battery-Powered Instruments
Hand-Held Scopemeters
Low-Cost Digital Oscilloscopes
Ultrasound Equipment
Cable Reverse Path
Broadband Wireless
Residential Power Line Networks
PRODUCT DESCRIPTION

The AD9214 is a 10-bit monolithic sampling analog-to-digital
converter (ADC) with an on-chip track-and-hold circuit, and
is optimized for low cost, low power, small size, and ease of use.
The product operates up to 105 MSPS conversion rate with
outstanding dynamic performance over its full operating range.
The ADC requires only a single 3.3 V (2.7 V to 3.6 V) power
supply and an encode clock for full performance operation. No
external reference or driver components are required for many
applications. The digital outputs are TTL/CMOS compatible
and a separate output power supply pin supports interfacing
with 3.3 V or 2.5 V logic.
The clock input is TTL/CMOS compatible. In the power-down
state, the power is reduced to 30 mW. A gain option allows
support for either 1 V p-p or 2 V p-p analog signal input swing.
Fabricated on an advanced CMOS process, the AD9214 is
available in a 28-lead surface-mount plastic package (28-SSOP)
specified over the industrial temperature range (–40°C to +85°C).
PRODUCT HIGHLIGHTS

High Performance—Outstanding ac performance from 65MSPS
to 105 MSPS. SNR greater than 55dB typical and as high
as 58dB.
Low Power—The AD9214 at 285mW consumes a fraction of
the power available in existing high-speed monolithic solutions.
In sleep mode, power is reduced to 30mW.
Single Supply—The AD9214 uses a single 3V supply, simplify-
ing system power supply design. It also features a separate digital
output driver supply line to accommodate 2.5V logic families.
Small Package—The AD9214 is packaged in a small 28-lead
surface-mount plastic package (28-SSOP).
AD9214–SPECIFICATIONS
DC SPECIFICATIONS

ANALOG INPUTS (AIN, AIN)
POWER SUPPLY
NOTESGain error and gain temperature coefficient are based on the ADC only (with a fixed 1.25 V external reference).Measured with 1 V AIN range for AD9214-80 and AD9214-105. Measured with 2 V AIN range for AD9214-65.REFSENSE externally connected to AGND, REF is configured as an output for the internal reference voltage.REFSENSE externally connected to AVDD, REF is configured as an input for an external reference voltage.10 kΩ to AVDD/3 on each input.IAVDD is measured with an analog input of 10.3 MHz, 0.5 dBFS, sine wave, rated encode rate, and PWRDN = 0. See Typical Performance Characteristics and
Applications section for IDrVDD.Power-down supply currents measured with PWRDN = 1; rated encode rate, AIN = full-scale dc input.Power consumption measured with AIN = full-scale dc input.
Specifications subject to change without notice.
(AVDD = 3 V, DrVDD = 3 V; TMIN = –40�C, TMAX = +85�C; external 1.25V voltage reference and rated encode
frequency used, unless otherwise noted.)
AD9214
DIGITAL SPECIFICATIONS

DIGITAL OUTPUTS
NOTESDigital Inputs include ENCODE and PWRDN.Digital Outputs include D0–D9 and OR.
Specifications subject to change without notice.
AC SPECIFICATIONS1

NOTESAC specifications based on a 1.0 V p-p full-scale input range for the AD9214-80 and AD9214-105, and a 2.0 V p-p full-scale input range for the AD9214-65. An
external reference is used.
(AVDD = 3 V, DrVDD = 3 V; ENCODE = Maximum Conversion Rate; TMIN = –40�C, TMAX = +85�C; external
1.25 V voltage reference used, unless otherwise noted.)
(AVDD = 3 V, DrVDD = 3 V; TMIN = –40�C, TMAX = +85�C)
AD9214–SPECIFICATIONS
SWITCHING SPECIFICATIONS

*tV and tPD are measured from the 1.5 V level of the ENCODE input to the 50% levels of the digital output swing. The digital output load during test is not to exceed
an ac load of 5 pF or a dc current of ±40 µA.
Specifications subject to change without notice.
Figure 1.Timing Diagram
(AVDD = 3 V, DrVDD = 3 V; ENCODE = Maximum Conversion Rate; TMIN = –40�C, TMAX = +85�C;
external 1.25 V voltage reference used, unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS1
Electrical
AVDD Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 V max
DrVDD Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 V max
Analog Input Voltage . . . . . . . . . . . –0.5 V to AVDD + 0.5 V
Analog Input Current . . . . . . . . . . . . . . . . . . . . . . . 0.4 mA
Digital Input Voltage . . . . . . . . . . . –0.5 V to AVDD + 0.5 V
Digital Output Current . . . . . . . . . . . . . . . . . . 20 mA max
REF Input Voltage . . . . . . . . . . . . . –0.5 V to AVDD + 0.5 V
Environmental2
Operating Temperature Range (Ambient)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
Maximum Junction Temperature . . . . . . . . . . . . . . . 150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . 150°C
Storage Temperature Range (Ambient) . . . –65°C to +150°C
NOTESAbsolute maximum ratings are limiting values to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability is not necessarily implied. Exposure to absolute maximum rating condi-
tions for an extended period of time may affect device reliability.Typical thermal impedances (package = 28 SSOP); θJA = 49°C/W. These
measurements were taken on a 6-layer board in still air with a solid
ground plane.
EXPLANATION OF TEST LEVELS
100% production tested.100% production tested at 25°C and guaranteed by design
and characterization at specified temperatures.
IIISample Tested OnlyParameter is guaranteed by design and characterization
testing.Parameter is a typical value only.100% production tested at 25°C and guaranteed by design
and characterization for industrial temperature range.
ORDERING GUIDE
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9214 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
AD9214
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
28-Lead Shrink Small Outline Package
TERMINOLOGY
Analog Bandwidth

The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay

The delay between the 50% point of the rising edge of the
ENCODE command and the instant at which the analog input
is sampled.
Aperture Uncertainty (Jitter)

The sample-to-sample variation in aperture delay.
Differential Analog Input Resistance, Differential Analog
Input Capacitance and Differential Analog Input Impedance

The real and complex impedances measured at each analog
input port. The resistance is measured statically and the capaci-
tance and differential input impedances are measured with a
network analyzer.
Differential Analog Input Voltage Range

The peak-to-peak differential voltage that must be applied to
the converter to generate a full-scale response. Peak differen-
tial voltage is computed by observing the voltage on a single
pin and subtracting the voltage from the other pin, which is
180 degrees out of phase. Peak-to-peak differential is computed
by rotating the inputs phase 180 degrees and taking the peak
measurement again. Then the difference is computed between
both peak measurements.
Differential Nonlinearity

The deviation of any code width from an ideal 1 LSB step.
Effective Number of Bits

The effective number of bits (ENOB) is calculated from the
measured SNR based on the equation:
Encode Pulsewidth/Duty Cycle

Pulsewidth high is the minimum amount of time that the ENCODE
pulse should be left in Logic “1” state to achieve rated performance;
pulsewidth low is the minimum time ENCODE pulse should be left
in low state. See timing implications of changing tENCH in text. At a
given clock rate, these specs define an acceptable Encode duty cycle.
Full-Scale Input Power

Expressed in dBm. Computed using the following equation:
Gain Error

Gain error is the difference between the measured and ideal full
scale input voltage range of the ADC.
Harmonic Distortion, Second
Harmonic Distortion, Third

The ratio of the rms signal amplitude to the rms value of the
third harmonic component, reported in dBc.
Integral Nonlinearity

The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a “best straight line”
determined by a least square curve fit.
Minimum Conversion Rate

The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed limit.
Maximum Conversion Rate

The encode rate at which parametric testing is performed.
Output Propagation Delay

The delay between a differential crossing of ENCODE and
ENCODE and the time when all output data bits are within
valid logic levels.
Noise (for any range within the ADC)
Where Z is the input impedance, FS is the full-scale of the
device for the frequency in question, SNR is the value for the
particular input level and Signal is the signal level within the
ADC reported in dB below full-scale. This value includes both
thermal and quantization noise.
Power Supply Rejection Ratio (PSRR)

The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise-and-Distortion (SINAD)

The ratio of the rms signal amplitude (set 0.5 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, including harmonics but excluding dc.
Signal-to-Noise Ratio (without Harmonics)

The ratio of the rms signal amplitude (set at 0.5 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, excluding the first five harmonics and dc.
Spurious-Free Dynamic Range (SFDR)

The ratio of the rms signal amplitude to the rms value of the
peak spurious spectral component. The peak spurious compo-
nent may or may not be a harmonic. May be reported in dBc
(i.e., degrades as signal level is lowered), or dBFS (always
related back to converter full scale).
Two-Tone Intermodulation Distortion Rejection

The ratio of the rms value of either input tone to the rms value
of the worst third order intermodulation product; reported in dBc.
Two-Tone SFDR

The ratio of the rms value of either input tone to the rms value
of the peak spurious component. The peak spurious component
may or may not be an intermodulation distortion product. May
be reported in dBc (i.e., degrades as signal level is lowered), or
in dBFS (always related back to converter full scale).
Worst Other Spur

The ratio of the rms signal amplitude to the rms value of the
AD9214
Transient Response Time

Transient response is defined as the time it takes for the ADC
to reacquire the analog input after a transient from 10% above
negative full scale to 10% below positive full scale.
Figure 2.Analog Input Stage
Figure 3.Encode Inputs
Figure 4.Digital Output Stage
EQUIVALENT CIRCUITS

Figure 5.REF Configured as an Output
Figure 6.REF Configured as an Input
Out-of-Range Recovery Time

Out-of-range recovery time is the time it takes for the ADC to
reacquire the analog input after a transient from 10% above
positive full scale to 10% above negative full scale, or from 10%
below negative full scale to 10% below positive full scale.
TPC 1.FFT: fS = 105 MSPS, fIN = ~50.3 MHz; AIN = –0.5 dBFS
Differential, 1 V p-p Analog Input Range40
FREQUENCY – MHz

TPC 2.FFT: fS = 80 MSPS, fIN = 70 MHz; AIN = –0.5 dBFS,
1 V p-p Analog Input Range
FREQUENCY– MHz
–10

TPC 3.FFT: fS = 105 MSPS; fIN = 70 MHz (1 V p-p)
TPC 4.FFT: fS = 65 MSPS, fIN = 15.3 MHz (2 V p-p) with
AD8138 Driving AIN
TPC 5.Harmonic Distortion (Second and Third) and SFDR
vs. AIN Frequency (1 V p-p, fS = 105 MSPS)
TPC 6.Harmonic Distortion (Second and Third) and SFDR
vs. AIN Frequency (1 V p-p, fS = 80 MSPS)
AD9214
TPC 7.Harmonic Distortion (Second and Third) and SFDR
vs. AIN Frequency (1 V p-p and 2 V p-p, fS = 65 MSPS)
FREQUENCY – MHz

TPC 8.Two-Tone Intermodulation Distortion (29.3 MHz,
30.3 MHz; 1 V p-p, fS = 80 MSPS)
dB
FREQUENCY – MHz

TPC 9.Two-Tone Intermodulation Distortion (30 MHz and
31 MHz; 1 V p-p, fS = 105 MSPS)
TPC 10.SINAD and SFDR vs. Encode Rate (fIN = 10.3 MHz;
1 V p-p and 2 V p-p)
TPC 11.SINAD and SFDR vs. Encode Pulsewidth High
(1 V p-p)

TPC 12.IAVDD and IDrVDD vs. Encode Rate (fAIN = 10.3 MHz,
–0.5 dBFS, and –3 dBFS) CLOAD on Digital Outputs ~7 pF
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