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AD8698AR-REEL7 |AD8698ARREEL7ADN/a2500avaiPrecision Rail-to-Rail Output Operational Amplifier


AD8698AR-REEL7 ,Precision Rail-to-Rail Output Operational AmplifierCHARACTERISTICS Offset Voltage V 20 100 µV OS −40°C < T < +85°C 300 µV AOffset V ..
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AD8698AR-REEL7
Precision Rail-to-Rail Output Operational Amplifier
Dual Precision, Rail-to-Rail Output
Operational Amplifier

Rev. 0
FEATURES
Low offset voltage: 100 µV max
Low offset voltage drift: 2 µV/°C max
Low input bias current: 700 pA max
Low noise: 8 nV/√Hz
High common-mode rejection: 118 dB min
Wide operating temperature: −40°C to +85°C
No phase reversal
APPLICATIONS
Photodiode amplifier
Sensors and controls
Multipole filters
Integrator
GENERAL DESCRIPTION

The AD8698 is a high precision, rail-to-rail output, low noise,
low input bias current operational amplifier. Offset voltage is a
respectable 100 µV max and drift over temperature is below
2 µV/°C, eliminating the need for manual offset trimming. The
AD8698 is ideal for high impedance sensors, minimizing offset
errors due to input bias and offset currents.
The rail-to-rail output maximizes dynamic range in a variety of
applications, such as photodiode amplifiers, DAC I/V
amplifiers, filters, and ADC input amplifiers.
The AD8698 dual amplifiers are offered in 8-lead MSOP and
narrow 8-lead SOIC packages. The MSOP version is available
in tape and reel only.
CONNECTION DIAGRAMS
8-Lead SOIC
(R-8)
OUT A
–IN A
+IN A
OUT B
–IN B
+IN B

04807-0-069
8-Lead MSOP
(RM-8)
OUT A
–IN A
+IN A
OUT B
–IN B
+IN B

04807-0-070
Figure 1.
TABLE OF CONTENTS
Specifications....................................................................................3
Absolute Maximum Ratings...........................................................5
Thermal Resistance......................................................................5
ESD Caution..................................................................................5
Typical Performance Characteristics.............................................6
Applications....................................................................................14
Input Overvoltage Protection...................................................14
Driving Capacitive Loads..........................................................14
Instrumentation Amplifier.......................................................15
Composite Amplifier.................................................................15
Low Noise Applications............................................................16
Driving ADCs.............................................................................16
Using the AD8698 in Active Filter Designs...........................16
Outline Dimensions.......................................................................17
Ordering Guide..........................................................................17
REVISION HISTORY
4/04—Revision 0: Initial Version

SPECIFICATIONS
VS = ±15 V, VCM = 0 V (@TA = 25oC, unless otherwise noted.)
Table 1.

INPUT CHARACTERISTICS
Offset Voltage VOS 20 100 µV −40°C < TA < +85°C 300 µV
Offset Voltage Drift ∆VOS/∆T −40°C < TA < +85°C 0.6 2 µV/°C
Input Bias Current IB 700 pA −40°C < TA < +85°C 1500 pA
Input Offset Current IOS 700 pA −40°C < TA < +85°C 1500 pA
Input Voltage Range IVR −40°C < TA < +85°C −13.5V 13.5 V
Common-Mode Rejection Ratio CMRR VCM = ±13.5 V 118 132 dB
Large Signal Voltage Gain AVO RL = 2 kΩ, VO = ±13.5 V 900 1450 V/mV
Input Capacitance CDIFF 6.5 pF
CCM
OUTPUT CHARACTERISTICS
Output Voltage Swing (Ref. to GND) VOH IL = 1 mA, −40°C < TA < +85°C 14.85 14.93 V
VOH IL = 5 mA, −40°C < TA < +85°C 14.6 14.8 V
(Ref. to GND) VOL IL = 1 mA, −40°C < TA < +85°C −14.93 −14.6 V
POWER SUPPLY
Power Supply Rejection Ratio PSRR ±2.5 V < VS < ±15 V 114 132 dB
Supply Current ISY VO = 0 V 2.8 3.2 mA −40°C < TA < +85°C 3.8 mA
Supply Voltage
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 0.4 V/µs
Gain Bandwidth Product GBP 1 MHz
Phase Margin
NOISE PERFORMANCE
Input Noise Voltage en p-p 0.1 Hz < f < 10 Hz 0.6 µV p-p
Input Voltage Noise Density en f = 10 Hz 15 nV/√Hz
Input Voltage Noise Density en f = 1 kHz 8 nV/√Hz
VS = ±2.5 V, VCM = 0 V (@TA = 25oC, unless otherwise noted.)
Table 2.

INPUT CHARACTERISTICS
Offset Voltage VOS 20 100 µV −40°C < TA < +85°C 300 µV
Offset Voltage Drift ∆VOS/∆T −40°C < TA < +85°C 2 µV/°C
Input Bias Current IB 700 pA −40°C < TA < +85°C 1500 pA
Input Offset Current IOS 700 pA −40°C < TA < +85°C 1500 pA
Input Voltage Range IVR −40°C < TA < +85°C −1.5 +1.5 V
Common-Mode Rejection Ratio CMRR VCM = ±13.5 V 105 120 dB
Large Signal Voltage Gain AVO RL = 2 kΩ, VO = ±13.5 V 600 1200 V/mV
Input Capacitance CDIFF 6.4 pF
OUTPUT CHARACTERISTICS
Output Voltage Swing (Ref. to GND) VOH IL = 1 mA, −40°C < TA < +85°C 2.35 2.44 V
VOH IL = 5 mA, −40°C < TA < +85°C 2.1 2.29 V
(Ref. to GND) VOL IL = 1 mA, −40°C < TA < +85°C −2.43 −2.2 V VOL IL = 5 mA, TA = 25°C −2.15 −1.9 V
POWER SUPPLY
Power Supply Rejection Ratio PSRR ±2.5 V < VS < ±15 V 114 132 dB
Supply Current ISY VO = 0 V 2.3 2.8 mA −40°C < TA < +85°C 3.3 mA
Supply Voltage
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ 0.4 V/µs
Gain Bandwidth Product GBP 1 MHz
Phase Margin
NOISE PERFORMANCE
Input Noise Voltage en p-p 0.1 Hz < f < 10Hz 0.6 µV p-p
Input Voltage Noise Density en f = 10 Hz 15 nV/√Hz
Input Voltage Noise Density en f =1 kHz 8 nV/√Hz
ABSOLUTE MAXIMUM RATINGS
Table 3.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE

θJA is specified for the worst-case conditions, i.e., θJA is specified
for devices soldered in circuit boards for surface-mount
packages.
Table 4. Thermal Resistance

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 1000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
TYPICAL PERFORMANCE CHARACTERISTICS
NUMBE
R OF AMP
LIFIE0.20.40.60.81.01.2
TCVOS (µV/°C)

Figure 2. Input Offset Voltage Drift Distribution
NUMBE
R OF AMP
LIFIE
VOS (µV)

Figure 3. Offset Voltage Distribution
NUMBE
R OF AMP
LIFIE
IB (pA)

Figure 4. Input Bias Distribution
GAIN (
SE M
egrees)
FREQUENCY (Hz)
10k1M100k10M

Figure 5. Open-Loop Gain and Phase vs. Frequency
CLOSED-
OOP GAIN (
FREQUENCY (Hz)
10k1k100k1M10M

Figure 6. Closed-Loop Gain vs. Frequency
OUTP
UT IMP
DANCE
1001k10k100k1M
FREQUENCY (Hz)

Figure 7. Output Impedance vs. Frequency
VOLTA
GE (
V/D
IV)
TIME (100µs/DIV)

04807-0-037
Figure 8. Large Signal Transient Response
VOLTA
GE (
100mV/D
IV)
TIME (100µs/DIV)

04807-0-044
Figure 9. Small Signal Transient Response
OVER
OOT (
CAPACITIVE LOAD (pF)

04807-0-013
Figure 10. Overshoot vs. Load Capacitance
VOLTAGE (V)
OLTAGE (mV)
TIME (10µs/DIV)

04807-0-041
Figure 11. Positive Overvoltage Recovery
TIME (400µs/DIV)

VOLTAGE (V)
OLTAGE (mV)
–15
Figure 12. Negative Overvoltage Recovery
CMRR (dB)
FREQUENCY (Hz)
10k1k100k1M10M

Figure 13. CMRR vs. Frequency
1001001k10k100k1M
FREQUENCY (Hz)

Figure 14. PSRR vs. Frequency
VOLTAGE (200nV/DIV)
TIME (1s/DIV)

04807-0-035
Figure 15. Input Voltage Noise
VOLTA
GE N
OISE D
ITY (

Hz)
FREQUENCY (Hz)0.1101001k

Figure 16. Voltage Noise Density vs. Frequency
FREQUENCY (Hz)0.1101001k

CURRE
NT NOIS
DE
ITY
(nV
Hz)
Figure 17. Current Noise Density vs. Frequency
ORT-CIRCUIT CURRE
NT (mA)0–40–20–60406080100
TEMPERATURE (°C)

Figure 18. Short-Circuit Current vs. Temperature
OUTPUT SW
ING (0–40–20–60406080100
TEMPERATURE (°C)

Figure 19. Output Swing vs. Temperature
OUTPUT VOLTAGE SW
ING (0–40–20–60406080100
TEMPERATURE (°C)

Figure 20. Output Voltage Swing vs. Temperature
–10

OFFSET VOLTA
GE (
0–40–20–60406080100
TEMPERATURE (°C)

Figure 21. ∆ Offset Voltage vs. Temperature
CMRR (dB)0–40–20–60406080100
TEMPERATURE (°C)

Figure 22. CMRR vs. Temperature
RR (dB)0–40–20–60406080100
TEMPERATURE (°C)

Figure 23. PSRR vs. Temperature
INP
T BIAS
CURRE
NT (pA)
TEMPERATURE (°C)

Figure 24. ∆ Input Bias Current vs. Temperature
OUTPUT SW
ING (
LOAD CURRENT (mA)0101520

Figure 25. ∆ Output Voltage Swing from Rails vs. Load Current
CURRE
NT (mA)
TEMPERATURE (°C)

Figure 26. Supply Current vs. Temperature
CHANNE
L S
ARATION (dB)
FREQUENCY (Hz)
10k1k100k1M10M

Figure 27. Channel Separation
NUMBE
R OF AMP
LIFIE
VOS (µV)

Figure 28. Offset Voltage Distribution
GAIN (
HAS
MARGIN (De
gre
FREQUENCY (Hz)
10k1M100k10M

Figure 29. Open-Loop Gain and Phase vs. Frequency
OUTP
UT IMP
DANCE
1001k10k100k1M
FREQUENCY (Hz)

Figure 30. Output Impedance vs. Frequency
VOLTA
GE (
500mV/D
IV)
TIME (100µs/DIV)

04807-0-038
Figure 31. Large Signal Transient Response
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