AD8309ARU-REEL7 ,5 MHz.500 MHz 100 dB Demodulating Logarithmic Amplifier with Limiter OutputSPECIFICATIONSS A1 1Parameter Conditions Min Typ Max UnitsINPUT STAGE (Inputs INHI, INLO)2Maximum I ..
AD830AN ,High Speed, Video Difference AmplifierSpecificationsY2 4 5 VNDifferential Gain Error: 0.06%Differential Phase Error: 0.088NC = NO CONNECT ..
AD830JR ,High Speed, Video Difference AmplifierCHARACTERISTICSOutput Voltage Swing R ≥ 150 Ω±3.2 ±3.5 ±3.2 ±3.5 VLR ≥ 150 Ω, ±4 V ±2.2 +2.7, –2.4 ..
AD830JR. ,High Speed, Video Difference AmplifierCHARACTERISTICSOutput Voltage Swing R ≥ 1 kΩ±12 +13.8, –13.8 ±12 +13.8, –13.8 VLR ≥ 1 kΩ, ±16.5 V ± ..
AD8310ARM ,Fast, Voltage-Out DC-440 MHz 95 dB Logarithmic AmplifierSPECIFICATIONS A SParameter Conditions Min Typ Max UnitINPUT STAGE (Inputs INHI, INLO)1Maximum Inpu ..
AD8310ARMZ ,Fast Response, DCGENERAL DESCRIPTION range. The AD8310 is a complete, dc–440 MHz demodulating The output voltage run ..
ADP3192JCPZ-RL , 8-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
ADP3192JCPZ-RL , 8-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
ADP3196JCPZ-RL , 6-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
ADP3196JCPZ-RL , 6-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
ADP3198JCPZ-RL , 8-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
ADP3198JCPZ-RL , 8-Bit Programmable 2- to 4-Phase Synchronous Buck Controller
AD8309ARU-AD8309ARU-REEL7
5 MHz.500 MHz 100 dB Demodulating Logarithmic Amplifier with Limiter Output
REV. B
5 MHz–500 MHz 100 dB Demodulating
Logarithmic Amplifier with Limiter Output
FUNCTIONAL BLOCK DIAGRAM
INHI
INLOENBL
LMHI
LMLO
LMDR
VLOG
FLTRTYP GAIN 18dB
FEATURES
Complete Multistage Log-Limiting IF Amplifier
100 dB Dynamic Range: –78 dBm to +22 dBm (Re 50 V)
Stable RSSI Scaling Over Temperature and Supplies:
20 mV/dB Slope, –95 dBm Intercept60.4 dB RSSI Linearity up to 200 MHz
Programmable Limiter Gain and Output Current
Differential Outputs to 10 mA, 2.4 V p-p
Overall Gain 100 dB, Bandwidth 500 MHz
Constant Phase (Typical 680 ps Delay Skew)
Single Supply of +2.7V to +6.5 V at 16 mA Typical
Fully Differential Inputs, RIN = 1 kV, CIN = 2.5 pF
500 ns Power-Up Time, <1 mA Sleep Current
APPLICATIONS
Receivers for Frequency and Phase Modulation
Very Wide Range IF and RF Power Measurement
Receiver Signal Strength Indication (RSSI)
Low Cost Radar and Sonar Signal Processing
Instrumentation: Network and Spectrum Analyzers
PRODUCT DESCRIPTIONThe AD8309 is a complete IF limiting amplifier, providing both
an accurate logarithmic (decibel) measure of the input signal
(the RSSI function) over a dynamic range of 100 dB, and a
programmable limiter output, useful from 5 MHz to 500 MHz.
It is easy to use, requiring few external components. A single
supply voltage of +2.7 V to +6.5 V at 16 mA is needed, corre-
sponding to a power consumption of under 50 mW at 3 V, plus
the limiter bias current, determined by the application and
typically 2 mA, providing a limiter gain of 100 dB when using
200W loads. A CMOS-compatible control interface can enable
the AD8309 within about 500 ns and disable it to a standby
current of under 1 mA.
The six cascaded amplifier/limiter cells in the main path have a
small signal gain of 12.04 dB (·4), with a –3 dB bandwidth of
850 MHz, providing a total gain of 72 dB. The programmable
output stage provides a further 18 dB of gain. The input is fully
differential and presents a moderately high impedance (1 kW in
parallel with 2.5 pF). The input-referred noise-spectral-density,
when driven from a terminated 50 W, source is 1.28 nV/√Hz,
equivalent to a noise figure of 3 dB. The sensitivity of the
AD8309 can be raised by using an input matching network.
Each of the main gain cells includes a full-wave detector. An
additional four detectors, driven by a broadband attenuator, are
used to extend the top end of the dynamic range by over 48 dB.
The overall dynamic range for this combination extends from
–91 dBV (–78 dBm at the 50 W level) to a maximum permissible
value of +9 dBV, using a balanced drive of antiphase inputs each
of 2 V in amplitude, which would correspond to a sine wave
power of +22 dBm if the differential input were terminated in
50 W. The slope of the RSSI output is closely controlled to
20 mV/dB, while the intercept is set to –108 dBV (–95 dBm
re 50 W). These scaling parameters are determined by a band-
gap voltage reference and are substantially independent of tem-
perature and supply. The logarithmic law conformance is typically
within –0.4 dB over the central 80 dB of this range at any fre-
quency between 10MHz and 200 MHz, and is degraded only
slightly at 500 MHz.
The RSSI response time is nominally 67 ns (10%–90%). The
averaging time may be increased without limit by the addition of
an external capacitor. The full output of 2.34 V at the maximum
input of +9 dBV can drive any resistive load down to 50 W and
this interface remains stable with any value of capacitance on
the output.
The AD8309 is fabricated on an advanced complementary
bipolar process using silicon-on-insulator isolation techniques
and is available in the industrial temperature range of –40°C to
+85°C, in a 16-lead TSSOP package.
AD8309–SPECIFICATIONSLOGARITHMIC AMPLIFIER
NOTESMinimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values.The input level is specified in “dBV” since logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of
1 V rms. A power level of 0 dBm (1 mW) in a 50 W termination corresponds to an input of 0.2236 V rms. Hence, the relationship between dBV and dBm is a fixed
offset of +13 dBm in the special case of a 50 W termination.Due to the extremely high Gain Bandwidth Product of the AD8309, the output of either LMHI or LMLO will be unstable for levels below –78 dBV (–65 dBm, re 50 W).
Specifications subject to change without notice.
(VS = +5 V, TA = +258C, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS*Supply Voltage VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7.5 V
Input Level, Differential (re 50 W) . . . . . . . . . . . . . . .+26 dBm
Input Level, Single-Ended (re 50 W) . . . . . . . . . . . . .+20 dBm
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . .500 mWJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150°C/WJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27.6°C/W
Maximum Junction Temperature . . . . . . . . . . . . . . . .+125°C
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8309 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
COM2VLOG
VPS1
PADL
INHI
INLO
PADL
COM1
ENBL
VPS2
PADL
LMHI
LMLO
PADL
FLTR
LMDR
PIN FUNCTION DESCRIPTIONS
ORDERING GUIDEOperating Temperature Range . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . .+300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may effect device reliability.
ENABLE VOLTAGE – V
SUPPLY CURRENT – mA
0.0001 Figure 1.Supply Current vs. Enable Voltage @
TA = –40°C, +25°C and +85°C
Figure 2.Power On/Off Response Time with RF Input of
–93 dBV to –13 dBV
Figure 3.Large Signal RSSI Pulse Response with
CL = 100pF and RL = 50W and 75W (Curves Overlap)
AD8309–Typical Performance Characteristics Figure 4.RSSI Pulse Response for Inputs Stepped from
Zero to –63 dBV, –43 dBV, –23 dBV, –3 dBV
Figure 5.Large Signal RSSI Pulse Response with RL = 100W
and CL = 33 pF, 100 pF and 330 pF (Curves Overlap)
Figure 6.Small Signal AC Response of RSSI Output with
External Filter Capacitance of 27 pF, 270 pF and 3300 pF
INPUT LEVEL – dBm Re 50V
RSSI OUTPUT – V
–80–60–40–2002040Figure 7.RSSI Output vs. Input Level, 100 MHz Sine Input,
at TA = –40°C, +25°C and +85°C, Single-Ended Input
INPUT LEVEL – dBm Re 50V
RSSI OUTPUT – V
0.5–80–60–40–2002040 Figure 8.RSSI Output vs. Input Level, at TA = +25°C, for
Frequencies of 5 MHz, 50 MHz, 100 MHz and 200 MHz
INPUT LEVEL – dBm Re 50V
RSSI OUTPUT – V
0.5–80–60–40–2002040 Figure 9.RSSI Output vs. Input Level, at TA = +25°C, for
INPUT LEVEL – dBm Re 50V
ERROR – dB–80–60–40–2002040 Figure 10.Log Linearity of RSSI Output vs. Input Level,
100 MHz Sine Input, at TA = –40°C, +25°C, and +85°C
INPUT LEVEL – dBm Re 50V
ERROR – dB–80–70–60–50–40–30–20–100102030Figure 11.Log Linearity of RSSI Output vs. Input Level, at
TA = +25°C, for Frequencies of 5 MHz, 50 MHz, 100 MHz
and 200 MHz
INPUT LEVEL – dBm Re 50V
ERROR – dB–80–70–60–50–40–30–20–100102030 Figure 12.Log Linearity of RSSI Output vs. Input Level,
AD8309
FREQUENCY – MHz
RSSI SLOPE – mV/dB1001000Figure 13.RSSI Slope vs. Frequency Using Termination of
52.3W in Series with 4.7 nH
Figure 14.Limiter Output at 300 MHz for a Sine Wave
Input of –60 dBV (–47 dBm), Using an RLOAD of 50 W and an
RLIM of 100 W
Figure 15.Limiter Response at LMHI, LMLO with Pulsed
FREQUENCY – MHz
RSSI INTERCEPT – dBV
–1121001000Figure 16.RSSI Intercept vs. Frequency Using Termina-
tion of 52.3W in Series with 4.7 nH
RLIM – V
CURRENT – mA
15025035050Figure 17.Additional Supply Current and Limiter Out-
put Current vs. RLIM
INPUT LEVEL – dBm Re 50V
NORMALIZED
LIMITER PHASE RESPONSE – Degrees
–400Figure 18.Normalized Limiter Phase Response vs. Input
THEORY OF OPERATIONThe AD8309 is an advanced IF signal processing IC, intended
for use in high performance receivers, combining two key func-
tions. First, it provides a large voltage gain combined with pro-
gressive compression, through which an IF signal of high dynamic
range is converted into a square-wave (that is, hard limited)
output, from which frequency and phase information modulated
on this input can be recovered by subsequent signal processing.
For this purpose, the noise level referred to the input must be
very low, since it determines the detection threshold for the receiver.
Further, it is often important that the group delay in this ampli-
fier be essentially independent of the signal level, to minimize
the risk of amplitude-to-phase conversion. Finally, it is also desir-
able that the amplitude of the limited output be well defined and
temperature stable. In the AD8309, this amplitude can be con-
trolled by the user, or even completely shut off, providing greater
flexibility.
The second function is to provide a demodulated (baseband)
output proportional to the decibel value of the signal input,
which may be used to measure the signal strength. This output,
which typically runs from a value close to the ground level to a
few volts above ground, is called the Received Signal Strength
Indication, or RSSI. The provision of this function requires the
use of a logarithmic amplifier (log amp). For this output to be
suitable for measuring signal strength, it is important that its
scaling attributes are well controlled.
These are the logarithmic slope, specified in mV/dB, and the
intercept, often specified as an equivalent power level at the
amplifier input, although a log amp is inherently a voltage-
responding device. (See further discussion, below). Also
important is the law conformance, that is, how well the RSSI
approximates an ideal function. Many low quality log amps
provide only an approximate solution, resulting in large errors in
law conformance and scaling. All Analog Devices log amps are
designed with close attention to matters affecting accuracy of
the overall function.
In the AD8309, these two basic signal-processing functions are
combined to provide the necessary voltage gain with progressive
compression and hard limiting, and the determination of the
logarithmic magnitude of the input (RSSI). This combination is
called a log limiting amplifier. A good grasp of how this product
works will avoid many pitfalls in their application.
Log-Amp FundamentalsThe essential purpose of a logarithmic amplifier is to reduce a
signal of wide dynamic range to its decibel equivalent. It is thus
primarily a measurement device. The logarithmic representation
leads to situations that may be confusing or even paradoxical.
For example, a voltage offset added to the RSSI output of a log
amp is equivalent to a gain increase ahead of its input.
When all the variables expressed as voltages, then, regardless of
the particular structure, the output can be expressed as
VOUT = VY log (VIN /VX)(1)
where VY is the “slope voltage.” VIN is the input voltage, and VX
is the “intercept voltage.” The logarithm is usually to base-10,
which is appropriate to a decibel-calibrated device, in which
references. Note that (1) is mathematically incomplete in rep-
resenting the behavior of a demodulating log amp such as the
AD8309, where VIN has an alternating sign. However, the basic
principles are unaffected.
Figure 19 shows the input/output relationship of an ideal log
amp, conforming to Equation (1). The horizontal scale is loga-
rithmic, and spans a very wide dynamic range, shown here as
over 120 dB, that is, six decades of voltage or twelve decades of
input-referred power. The output passes through zero (the
“log-intercept”) at the unique value VIN = VX and becomes
negative for inputs below the intercept. In the ideal case, the
straight line describing VOUT for all values of VIN would con-
tinue indefinitely in both directions. The dotted line shows that
the effect of adding an offset voltage VSHIFT to the output is to
lower the effective intercept voltage VX.
VOUT = 0Figure 19.Ideal Log Amp Function
Exactly the same modification could be achieved raising the gain
(or signal level) ahead of the log amp by the factor VSHIFT/VY.
For example, if VY is 400 mV/decade (that is, 20 mV/dB, as for
the AD8309), an offset of 120 mV added to the output will
appear to lower the intercept by two tenths of a decade, or 6 dB.
Adding an offset to the output is thus indistinguishable from
applying an input level that is 6 dB higher.
The log amp function described by (1) differs from that of a
linear amplifier in that the incremental gain DVOUT/DVIN is a
very strong function of the instantaneous value of VIN, as is
apparent by calculating the derivative. For the case where the
logarithmic base is e, it is easy to show that(2)
That is, the incremental gain of a log amp is inversely propor-
tional to the instantaneous value of the input voltage. This re-
mains true for any logarithmic base. A “perfect” log amp would
be required to have infinite gain under classical “small-signal”
(zero-amplitude) conditions. This demonstrates that, whatever
means might be used to implement a log amp, accurate HF
response under small signal conditions (that is, at the lower end
of the full dynamic range) demands the provision of a very high
gain-bandwidth product. A wideband log amp must therefore use
AD8309As a consequence of this high gain, even very small amounts of
thermal noise at the input of a log amp will cause a finite output
for zero input, resulting in the response line curving away from
the ideal (Figure 19) at small inputs, toward a fixed baseline.
This can either be above or below the intercept, depending on
the design. Note that the value specified for this intercept is
invariably an extrapolated one: the RSSI output voltage will never
attain a value of exactly zero in a single supply implementation.
Voltage (dBV) and Power (dBm) ResponseWhile Equation 1 is fundamentally correct, a simpler formula is
appropriate for specifying the RSSI calibration attributes of a
log amp like the AD8309, which demodulates an RF input. The
usual measure is input power:
VOUT = VSLOPE (PIN – P0 )(3)
VOUT is the demodulated and filtered RSSI output, VSLOPE is the
logarithmic slope, expressed in volts/dB, PIN is the input power,
expressed in decibels relative to some reference power level and
P0 is the logarithmic intercept, expressed in decibels relative to
the same reference level.
The most widely used convention in RF systems is to specify
power in decibels above 1 mW in 50 W, written dBm. (However,
that the quantity [PIN – P0 ] is simply dB). The logarithmic
function disappears from this formula because the conversion
has already been implicitly performed in stating the input in
decibels.
Specification of log amp input level in terms of power is strictly
a concession to popular convention: they do not respond to
power (tacitly “power absorbed at the input”), but to the input
voltage. In this connection, note that the input impedance of the
AD8309 is much higher that 50 W, allowing the use of an im-
pedance transformer at the input to raise the sensitivity, by up
to 13 dB.
The use of dBV, defined as decibels with respect to a 1 V rms sine
amplitude, is more precise, although this is still not unambiguous
complete as a general metric, because waveform is also involved
in the response of a log amp, which, for a complex input (such
as a CDMA signal) will not follow the rms value exactly. Since
most users specify RF signals in terms of power—more specifi-
cally, in dBm/50 W—we use both dBV and dBm in specifying
the performance of the AD8309, showing equivalent dBm levels
for the special case of a 50 W environment.
Progressive CompressionHigh speed, high dynamic range log amps use a cascade of
nonlinear amplifier cells (Figure 20) to generate the logarithmic
function from a series of contiguous segments, a type of piece-
wise-linear technique. This basic topology offers enormous gain-
bandwidth products. For example, the AD8309 employs in its
main signal path six cells each having a small-signal gain of
12.04 dB (·4) and a –3 dB bandwidth of 850 MHz, followed by
a final limiter stage whose gain is typically 18 dB. The overall
gain is thus 100,000 (100 dB) and the bandwidth to –10 dB
point at the limiter output is 525 MHz. This very high gain-
bandwidth product (52,500 GHz) is an essential prerequisite to
accurate operation under small signal conditions and at high
frequencies: Equation (2) reminds us that the incremental gain
VXFigure 20.Cascade of Nonlinear Gain Cells
Theory of Logarithmic AmplifiersTo develop the theory, we will first consider a somewhat differ-
ent scheme to that employed in the AD8309, but which is sim-
pler to explain, and mathematically more straightforward to
analyze. This approach is based on a nonlinear amplifier unit,
which we may call an A/1 cell, having the transfer characteristic
shown in Figure 21. We here use lowercase variables to define
the local inputs and outputs of these cells, reserving uppercase
for external signals.
The small signal gain DVOUT/DVIN is A, and is maintained for
inputs up to the knee voltage EK, above which the incremental
gain drops to unity. The function is symmetrical: the same drop
in gain occurs for instantaneous values of VIN less than –EK.
The large signal gain has a value of A for inputs in the range
–EK < VIN < +EK, but falls asymptotically toward unity for very
large inputs.
In logarithmic amplifiers based on this simple function, both the
slope voltage and the intercept voltage must be traceable to the
one reference voltage, EK. Therefore, in this fundamental analy-
sis, the calibration accuracy of the log amp is dependent solely on
this voltage. In practice, it is possible to separate the basic refer-
ences used to determine VY and VX. In the AD8309, VY is trace-
able to an on-chip band-gap reference, while VX is derived from
the thermal voltage kT/q and later temperature-corrected by a
precise means.
Let the input of an N-cell cascade be VIN, and the final output
VOUT. For small signals, the overall gain is simply AN. A six-
stage system in which A = 5 (14 dB) has an overall gain of
15,625 (84 dB). The importance of a very high small-signal ac
gain in implementing the logarithmic function has already been
noted. However, this is a parameter of only incidental interest in
the design of log amps; greater emphasis needs to be placed on
the nonlinear behavior.
Figure 21.The A/1 Amplifier Function
Thus, rather than considering gain, we will analyze the overall
nonlinear behavior of the cascade in response to a simple dc
input, corresponding to the VIN of Equation (1). For very small
inputs, the output from the first cell is V1 = AVIN; from the
second, V2 = A2 VIN, and so on, up to VN = AN VIN. At a certain
labeled ‹ on Figure 22. Below this input, the cascade of gain
cells is acting as a simple linear amplifier, while for higher values
of VIN, it enters into a series of segments which lie on a logarith-
mic approximation.
Continuing this analysis, we find that the next transition occurs
when the input to the (N–1)th stage just reaches EK, that is,
when VIN = EK /AN–2. The output of this stage is then exactly
AEK. It is easily demonstrated (from the function shown in
Figure 21) that the output of the final stage is (2A–1)EK (la-
beled „ on Figure 22). Thus, the output has changed by an
amount (A–1)EK for a change in VIN from EK /AN–1 to EK /AN–2,
that is, a ratio change of A.
VOUT
EK/AN–1EK/AN–2EK/AN–3EK/AN–4
(4A-3) EK
(3A-2) EK
(2A-1) EK
AEKFigure 22.The First Three Transitions
At the next critical point, labeled fi, the input is A times larger
and VOUT has increased to (3A–2)EK, that is, by another linear
increment of (A–1)EK. Further analysis shows that, right up to
the point where the input to the first cell reaches the knee volt-
age, VOUT changes by (A–1)EK for a ratio change of A in VIN.
Expressed as a certain fraction of a decade, this is simply log10(A).
For example, when A = 5 a transition in the piecewise linear
output function occurs at regular intervals of 0.7 decade (log10(A),
or 14 dB divided by 20 dB). This insight allows us to immedi-
ately state the “Volts per Decade” scaling parameter, which is
also the “Scaling Voltage” VY when using base-10 logarithms:(4)
Note that only two design parameters are involved in determin-
ing VY, namely, the cell gain A and the knee voltage EK, while
N, the number of stages, is unimportant in setting the slope of
the overall function. For A = 5 and EK = 100 mV, the slope
would be a rather awkward 572.3 mV per decade (28.6 mV/dB).
A well designed practical log amp will provide more rational
scaling parameters.
The intercept voltage can be determined by solving Equation
(4) for any two pairs of transition points on the output function
(see Figure 22). The result is:(5)
For the example under consideration, using N = 6, VX evaluates
to 4.28 mV, which thus far in this analysis is still a simple dc
Figure 23.A/0 Amplifier Functions (Ideal and tanh)
Care is needed in the interpretation of this parameter. It was
earlier defined as the input voltage at which the output passes
through zero (see Figure 19). Clearly, in the absence of noise
and offsets, the output of the amplifier chain shown in Figure 20
can only be zero when VIN = 0. This anomaly is due to the finite
gain of the cascaded amplifier, which results in a failure to main-
tain the logarithmic approximation below the “lin-log transition”
(Point ‹ in Figure 22). Closer analysis shows that the voltage
given by Equation (5) represents the extrapolated, rather than
actual, intercept.
Demodulating Log AmpsLog amps based on a cascade of A/1 cells are useful in baseband
(pulse) applications, because they do not demodulate their input
signal. Demodulating (detecting) log-limiting amplifiers such as
the AD8309 use a different type of amplifier stage, which we
will call an A/0 cell. Its function differs from that of the A/1 cell
in that the gain above the knee voltage EK falls to zero, as shown
by the solid line in Figure 23. This is also known as the limiter
function, and a chain of N such cells is often used alone to
generate a hard limited output, in recovering the signal in FM
and PM modes.
The AD640, AD606, AD608, AD8307, AD8309, AD8313 and
other Analog Devices communications products incorporating a
logarithmic IF amplifier all use this technique. It will be appar-
ent that the output of the last stage cannot now provide a loga-
rithmic output, since this remains unchanged for all inputs
above the limiting threshold, which occurs at VIN = EK /AN–1.
Instead, the logarithmic output is generated by summing the
outputs of all the stages. The full analysis for this type of log amp
is only slightly more complicated than that of the previous case.
It can be shown that, for practical purpose, the intercept voltage
VX is identical to that given in Equation (5), while the slope
voltage is:(6)
An A/0 cell can be very simple. In the AD8309 it is based on a
bipolar-transistor differential pair, having resistive loads RL and
an emitter current source IE. This amplifier limiter cell exhibits
an equivalent knee-voltage of EK = 2kT/q and a small-signal
gain of A = IERL /EK. The large signal transfer function is the
hyperbolic tangent (see dotted line in Figure 23). This function
is very precise, and the deviation from an ideal A/0 form is not
detrimental. In fact, the “rounded shoulders” of the tanh func-
tion beneficially result in a lower ripple in the logarithmic con-
formance than that which would be obtained using an ideal A/0
AD8309sensitivity to disturbances on the supply lines. With careful
design, the sensitivities to many other parametric variations, and
the effects of temperature and supply voltage, can be reduced to
negligible proportions.
STAGE 1STAGE 2STAGE N
RSLOPE
VLOG
VLIMVIN
+TOP-END
DETECTORS
CURRENT-SUMMING LINEFigure 24.Basic Log Amp Structure Using A/0 Stages and
Transconductance (gm) Cells for Summing
The output of each gain cell has an associated transconductance
(gm) cell, which converts the differential output voltage of the
cell to a pair of differential currents; these are summed by sim-
ply connecting the outputs of all the gm (detector) stages in
parallel. The total current is then converted back to a voltage by
a transresistance stage, which determines the slope of the loga-
rithmic output. This general scheme is depicted, in a simplified
single-sided form, in Figure 24. Additional detectors, driven by
a passive attenuator, may be added to extend the top end of the
dynamic range.
The slope voltage may now be decoupled from the knee-voltage
EK = 2kT/q, which is inherently PTAT. The detector stages are
biased with currents (not shown in the Figure) which can be
derived from a band-gap reference and thus be stable with tem-
perature. This is the architecture used in the AD8309. It affords
complete control over the magnitude and temperature behavior
of the logarithmic slope.
A further step is yet needed to achieve the demodulation response,
required in a log-limiter amp is to convert an alternating input
into a quasi- dc baseband output. This is achieved by modifying
the gm cells used for summation purposes to implement the
rectification function. Early log amps based on the progressive
compression technique used half-wave rectifiers, which made
post-detection filtering difficult. The AD640 was the first com-
mercial monolithic log amp to use a full-wave rectifier; this
proprietary practice has been used in all subsequent Analog
Devices types.
We can model these detectors as being essentially linear gm cells,
but producing an output current that is independent of the sign
of the voltage applied to the input. That is, they implement the
absolute-value function. Since the output from the later A/0 stages
closely approximates an amplitude symmetric square wave for
even moderate input levels, the current output from each detec-
tor is almost constant over each period of the input. Somewhat
earlier detectors stages in the chain produce a waveform having
only very brief “dropouts” at twice the input frequency. Only
those detectors nearest the log amp’s input produce a low level
waveform that is approximately sinusoidal. When all these (cur-
rent mode) outputs are summed, the resulting signal has a wave-
form which is readily filtered, to provide a low residual ripple on
Intercept CalibrationMonolithic log amps from Analog Devices incorporate accurate
means to position the intercept voltage VX (or equivalent sine-
wave power for a demodulating log amp, when driven at a spe-
cific impedance level). Using the scheme shown in Figure 24,
the value of the intercept level departs considerably from that
predicted by the simple theory. Nevertheless, the intrinsic inter-
cept voltage is still proportional to EK, which is PTAT (propor-
tional to absolute temperature).
Recalling that the addition of an offset to the output produces
an effect which is indistinguishable from a change in the posi-
tion of the intercept, it will be apparent that we can cancel the
“left-right” motion of VX resulting from the temperature varia-
tion of EK by simply adding an offset at its demodulated output
having the required temperature behavior.
The precise temperature-shaping of the intercept-positioning
offset can result in a log amp having stable scaling parameters,
making it a true measurement device, for example, as a calibrated
Received Signal Strength Indicator (RSSI). In this application,
one is more interested in the value of the output for an input
waveform which is often sinusoidal (CW). The input level be
stated as an equivalent power, in dBm, but it is essential to
know the impedance level at which this “power” is presumed to
be measured. In an impedance of 50 W, 0 dBm (1 mW) corre-
sponds to a sinusoidal amplitude of 316.2 mV (223.6 mV rms).
For the AD8309, the intercept may be specified in dBm when
the input impedance is lowered to 50 W, by the addition of a
shunt resistor of 52.3 W, in which case it occurs at –95 dBm.
However, the response is actually to the voltage at the input, not
the power in the termination resistor, and should be specified in
dBV. A –95 dBm sine input across a 50 W resistance corre-
sponds to an amplitude of 5.6 mV, or –108 dBV, where 0 dBV is
specified as a sine waveform of 1 V rms, that is, 2.8 V p-p.
Note that a log amp’s intercept is a function of waveform. For
example, a square-wave input will read 6 dB higher than a sine-
wave of the same amplitude, and a Gaussian noise input 0.5 dB
higher than a sine wave of the same rms value. Further, a log
amp driven by the sum of two sinusoidal voltages of equal am-
plitude will show an output that is only 2.1 dB higher than the
response for a single sine wave drive, rather than the 3 dB that
might be expected if the device truly responded to input power.
These are characteristics exhibited by all demodulating log amps.
Dynamic RangeThe lower end of the dynamic range is determined largely by the
thermal noise floor, measured at the input of the amplifier chain.
For the AD8309, the short-circuit input-referred noise-spectral
density is 1.1 nV/√Hz, and 1.275 nV/√Hz when driven from a
net source impedance of 25 W (a terminated 50 W). This corre-
sponds to a noise power of –78 dBm in a 500 MHz bandwidth.
The upper end of the dynamic range is extended upward by the
addition of top-end detectors driven by a tapped attenuator. These
smaller signals are applied to additional full-wave detectors
whose outputs are summed with those of the main detectors.
With care in design, this extension in the dynamic range can be
‘seamless’ over the full frequency range. For the AD8309 it
amounts to a further 48 dB. When using a supply of 4.5 V or
