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AD734ADN/a25avai10 MHz, 4-Quadrant Multiplier/Divider


AD734 ,10 MHz, 4-Quadrant Multiplier/DividerSPECIFICATIONSA S S LTRANSFER FUNCTION

AD734
10 MHz, 4-Quadrant Multiplier/Divider
REV.C
10 MHz, 4-Quadrant
Multiplier/Divider
FEATURES
High Accuracy
0.1% Typical Error
High Speed
10 MHz Full-Power Bandwidth
450 V/ms Slew Rate
200 ns Settling to 0.1% at Full Power
Low Distortion
–80 dBc from Any Input
Third-Order IMD Typically –75 dBc at 10 MHz
Low Noise
94 dB SNR, 10 Hz to 20 kHz
70 dB SNR, 10 Hz to 10 MHz
Direct Division Mode
2 MHz BW at Gain of 100
APPLICATIONS
High Performance Replacement for AD534
Multiply, Divide, Square, Square Root
Modulator, Demodulator
Wideband Gain Control, RMS-DC Conversion
Voltage-Controlled Amplifiers, Oscillators, and Filters
Demodulator with 40 MHz Input Bandwidth

demodulator with input frequencies as high as 40 MHz as long
as the desired output frequency is less than 10 MHz.
The AD734AQ and AD734BQ are specified for the industrial
temperature range of –40°C to +85°C and come in a 14-lead
ceramic DIP. The AD734SQ/883B, available processed to
MIL-STD-883B for the military range of –55°C to +125°C, is
available in a 14-lead ceramic DIP.
PRODUCT HIGHLIGHTS

The AD734 embodies more than two decades of experience in
the design and manufacture of analog multipliers, to provide:A new output amplifier design with more than twenty times
the slew-rate of the AD534 (450 V/ms versus 20 V/ms) for a
full power (20 V pk-pk) bandwidth of 10 MHz.Very low distortion, even at full power, through the use of
circuit and trimming techniques that virtually eliminate all of
the spurious nonlinearities found in earlier designs.Direct control of the denominator, resulting in higher
multiplier accuracy and a gain-bandwidth product at small
denominator values that is typically 200 times greater than
that of the AD534 in divider modes.Very clean transient response, achieved through the use of a
novel input stage design and wide-band output amplifier,
which also ensure that distortion remains low even at high
frequencies.Superior noise performance by careful choice of device
geometries and operating conditions, which provide a
guaranteed 88 dB of dynamic range in a 20 kHz bandwidth.
CONNECTION DIAGRAM
14-Lead DIP
(Q Package and N Package)
PRODUCT DESCRIPTION

The AD734 is an accurate high speed, four-quadrant analog
multiplier that is pin-compatible with the industry-standard
AD534 and provides the transfer function W = XY/U. The
AD734 provides a low-impedance voltage output with a full-
power (20 V pk-pk) bandwidth of 10 MHz. Total static error
(scaling, offsets, and nonlinearities combined) is 0.1% of full
scale. Distortion is typically less than –80 dBc and guaranteed.
The low capacitance X, Y and Z inputs are fully differential. In
most applications, no external components are required to
define the function.
The internal scaling (denominator) voltage U is 10 V, derived
from a buried-Zener voltage reference. A new feature provides
the option of substituting an external denominator voltage,
allowing the use of the AD734 as a two-quadrant divider with a
1000:1 denominator range and a signal bandwidth that remains
10 MHz to a gain of 20 dB, 2 MHz at a gain of 40 dB and
200kHz at a gain of 60 dB, for a gain-bandwidth product of
200MHz.
The advanced performance of the AD734 is achieved by a
combination of new circuit techniques, the use of a high speed
complementary bipolar process and a novel approach to laser-
trimming based on ac signals rather than the customary dc
methods. The wide bandwidth (>40 MHz) of the AD734’s
input stages and the 200 MHz gain-bandwidth product of the
multiplier core allow the AD734 to be used as a low distortion
AD734–SPECIFICATIONS
INPUT INTERFACES (X, Y, & Z)
DENOMINATOR INTERFACES (U0, U1, & U2)
OUTPUT AMPLIFIER (W)
(TA = +258C, +VS = VP = +15 V, –VS = VN = –15 V, RL ‡ 2 kV)
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–18 V
Internal Power Dissipation2
for TJ max = 175°C . . . . . . . . . . . . . . . . . . . . . . . .500 mW
X, Y and Z Input Voltages . . . . . . . . . . . . . . . . . . . . VN to VP
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Operating Temperature Range
AD734A, B (Industrial) . . . . . . . . . . . . . . .–40°C to +85°C
AD734S (Military) . . . . . . . . . . . . . . . . . .–55°C to +125°C
Lead Temperature Range (soldering 60 sec) . . . . . . . .+300°C
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500 V
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied.14-Lead Ceramic DIP: q
ORDERING GUIDE
AD734
is typically less than 5 mV, which corresponds to a bias current
of only 100 nA. This low bias current ensures that mismatches
in the sources resistances at a pair of inputs does not cause an
offset error. These currents remain low over the full temperature
range and supply voltages.
The common-mode range of the X, Y and Z inputs does not
fully extend to the supply rails. Nevertheless, it is often possible
to operate the AD734 with one terminal of an input pair con-
nected to either the positive or negative supply, unlike previous
multipliers. The common-mode resistance is several megohms.
The full-scale output of –10 V can be delivered to a load resis-
tance of 1 kW (although the specifications apply to the standard
multiplier load condition of 2 kW). The output amplifier is
stable driving capacitive loads of at least 100 pF, when a slight
increase in bandwidth results from the peaking caused by this
capacitance. The 450 V/ms slew rate of the AD734’s output am-
plifier ensures that the bandwidth of 10 MHz can be maintained
up to the full output of 20 V pk-pk. Operation at reduced supply
voltages is possible, down to –8 V, with reduced signal levels.
Available Transfer Functions

The uncommitted (open-loop) transfer function of the AD734 is(1)
where AO is the open-loop gain of the output op-amp, typically
72 dB. When a negative feedback path is provided, the circuit
will force the quantity inside the brackets essentially to zero,
resulting in the equation
(X1 – X2)(Y1 – Y2) = U (Z1 – Z2)(2)
This is the most useful generalized transfer function for the
AD734; it expresses a balance between the product XY and the
product UZ. The absence of the output, W, in this equation
only reflects the fact that we have not yet specified which of the
inputs is to be connected to the op amp output.
Most of the functions of the AD734 (including division, unlike
the AD534 in this respect) are realized with Z1 connected to W.
So, substituting W in place of Z1 in the above equation results in
an output.(3)
The free input Z2 can be used to sum another signal to the
output; in the absence of a product signal, W simply follows the
voltage at Z2 with the full 10 MHz bandwidth. When not
needed for summation, Z2 should be connected to the ground
associated with the load circuit. We can show the allowable
polarities in the following shorthand form:(4)
In the recommended direct divider mode, the Y input is set to a
fixed voltage (typically 10 V) and U is varied directly; it may
have any value from 10 mV to 10 V. The magnitude of the ratio
Figure 1.AD734 Block Diagram
FUNCTIONAL DESCRIPTION

Figure 1 is a simplified block diagram of the AD734. Operation
is similar to that of the industry-standard AD534 and in many
applications these parts are pin-compatible. The main functional
difference is the provision for direct control of the denominator
voltage, U, explained fully on the following page. Internal sig-
nals are actually in the form of currents, but the function of the
AD734 can be understood using voltages throughout, as shown
in this figure. Pins are named using upper-case characters (such
as X1, Z2) while the voltages on these pins are denoted by sub-
scripted variables (for example, X1, Z2).
The AD734’s differential X, Y and Z inputs are handled by
wideband interfaces that have low offset, low bias current and
low distortion. The AD734 responds to the difference signals
X = X1 – X2, Y = Y1 – Y2 and Z = Z1 – Z2, and rejects
common-mode voltages on these inputs. The X, Y and Z
interfaces provide a nominal full-scale (FS) voltage of –10 V,
but, due to the special design of the input stages, the linear
range of the differential input can be as large as –17 V. Also
unlike previous designs, the response on these inputs is not
clipped abruptly above –15 V, but drops to a slope of one half.
The bipolar input signals X and Y are multiplied in a translinear
core of novel design to generate the product XY/U. The
denominator voltage, U, is internally set to an accurate,
temperature-stable value of 10 V, derived from a buried-Zener
reference. An uncalibrated fraction of the denominator voltage
U appears between the voltage reference pin (ER) and the
negative supply pin (VN), for use in certain applications where
a temperature-compensated voltage reference is desirable. The
internal denom-inator, U, can be disabled, by connecting the
denominator disable Pin 13 (DD) to the positive supply pin
(VP); the denom-inator can then be replaced by a fixed or
variable external volt-age ranging from 10 mV to more than 10 V.
The high-gain output op-amp nulls the difference between
XY/U and an additional signal Z, to generate the final output
W. The actual transfer function can take on several forms, de-
pending on the connections used. The AD734 can perform all
of the functions supported by the AD534, and new functions
using the direct-division mode provided by the U-interface.
Each input pair (X1 and X2, Y1 and Y2, Z1 and Z2) has a
differential input resistance of 50 kW; this is formed by “real”
resistors (not a small-signal approximation) and is subject to a
tolerance of –20%. The common-mode input resistance is
After temperature-correction (block TC), the reference voltage
is applied to transistor Qd and trimmed resistor Rd, which
generate the required reference current. Transistor Qu and
resistor Ru are not involved in setting up the internal denominator,
and their associated control pins U0, U1 and U2 will normally
be grounded. The reference voltage is also made available, via
the 100 kW resistor Rr, at Pin 9 (ER); the purpose of Qr is
explained below.
When the control pin DD (denominator disable) is connected to
VP, the internal source of Iu is shut off, and the collector cur-
rent of Qu must provide the denominator current. The resistor
Ru is laser-trimmed such that the multiplier denominator is
exactly equal to the voltage across it (that is, across pins U1 and
U2). Note that this trimming only sets up the correct internal
ratio; the absolute value of Ru (nominally 28 kW) has a
tolerance of –20%. Also, the alpha of Qu, (typically 0.995)
which might be seen as a source of scaling error, is canceled by
the alpha of other transistors in the complete circuit.
In the simplest scheme (Figure 3), an externally-provided
control voltage, VG, is applied directly to U0 and U2 and the
resulting voltage across Ru is therefore reduced by one VBE. For
example, when VG = 2 V, the actual value of U will be about
1.3V. This error will not be important in some closed-loop
applications, such as automatic gain control (AGC), but clearly
is not acceptable where the denominator value must be well-
defined. When it is required to set up an accurate, fixed value of
U, the on-chip reference may be used. The transistor Qr is
provided to cancel the VBE of Qu, and is biased by an external
resistor, R2, as shown in Figure 4. R1 is chosen to set the de-
sired value of U and consists of a fixed and adjustable resistor.
+VS
–VSNC

Figure 3.Low-Accuracy Denominator Control+VS
–VS

Figure 4.Connections for a Fixed Denominator
Table I shows useful values of the external components for set-
the AD734 can be operated using the standard (AD534) divider
connections (Figure 8), when the negative feedback path is
established via the Y2 input. Substituting W for Y2 in Equation
(2), we get(5)
In this case, note that the variable X is now the denominator,
and the above restriction (X/U £ 1.25) on the magnitude of the
X input does not apply. However, X must be positive in order
for the feedback polarity to be correct. Y1 can be used for
summing purposes or connected to the load ground if not
needed. The shorthand form in this case is(6)
In some cases, feedback may be connected to two of the avail-
able inputs. This is true for the square-rooting connections
(Fig-ure 9), where W is connected to both X1 and Y2. Setting
X1 = W and Y2 = W in Equation (2), and anticipating the
possibility of again providing a summing input, so setting X2 = S
and Y1 = S, we find, in shorthand form(7)
This is seen more generally to be the geometric-mean function,
since both U and Z can be variable; operation is restricted to
one quadrant. Feedback may also be taken to the U-interface.
Full details of the operation in these modes is provided in the
appropriate section of this data sheet.
Direct Denominator Control

A valuable new feature of the AD734 is the provision to replace
the internal denominator voltage, U, with any value from +10mV
to +10V. This can be used (1) to simply alter the multiplier
scaling, thus improve accuracy and achieve reduced noise levels
when operating with small input signals; (2) to implement an
accurate two-quadrant divider, with a 1000:1 gain range and an
asymptotic gain-bandwidth product of 200 MHz; (3) to achieve
certain other special functions, such as AGC or rms.
Figure 2 shows the internal circuitry associated with denomina-
tor control. Note first that the denominator is actually proportional
to a current, Iu, having a nominal value of 356 mA for U = 10 V,
whereas the primary reference is a voltage, generated by a buried-
Zener circuit and laser-trimmed to have a very low temperature
coefficient. This voltage is nominally 8 V with a tolerance of10%.
AD734
Table I.Component Values for Setting Up Nonstandard
Denominator Values

The denominator can also be current controlled, by grounding
Pin 3 (U0) and withdrawing a current of Iu from Pin 4 (U1).
The nominal scaling relationship is U = 28 · Iu, where u is
expressed in volts and Iu is expressed in milliamps. Note,
however, that while the linearity of this relationship is very good,
it is subject to a scale tolerance of –20%. Note that the common
mode range on Pins 3 through 5 actually extends from 4 V toV below VP, so it is not necessary to restrict the connection
of U0 to ground if it should be desirable to use some other
voltage.
The output ER may also be buffered, re-scaled and used as a
general-purpose reference voltage. It is generated with respect to
the negative supply line Pin 8 (VN), but this is acceptable when
driving one of the signal interfaces. An example is shown in
Figure 12, where a fixed numerator of 10 V is generated for a
divider application. There, Y2 is tied to VN but Y1 is 10 V above
this; therefore the common-mode voltage at this interface is still
5 V above VN, which satisfies the internal biasing requirements
(see Specifications table).
OPERATION AS A MULTIPLIER

All of the connection schemes used in this section are essentially
identical to those used for the AD534, with which the AD734 is
pin-compatible. The only precaution to be noted in this regard
is that in the AD534, Pins 3, 5, 9, and 13 are not internally
connected and Pin 4 has a slightly different purpose. In many
cases, an AD734 can be directly substituted for an AD534 with
immediate benefits in static accuracy, distortion, feedthrough,
and speed. Where Pin 4 was used in an AD534 application to
achieve a reduced denominator voltage, this function can now be
much more precisely implemented with the AD734 using alter-
native connections (see Direct Denominator Control, page 5).
Operation from supplies down to –8 V is possible. The supply
current is essentially independent of voltage. As is true of all
high speed circuits, careful power-supply decoupling is impor-
tant in maintaining stability under all conditions of use. The
decoupling capacitors should always be connected to the load
ground, since the load current circulates in these capacitors at
high frequencies. Note the use of the special symbol (a triangle
with the letter ‘L’ inside it) to denote the load ground.
Standard Multiplier Connections

Figure 5 shows the basic connections for multiplication. The X
and Y inputs are shown as optionally having their negative
nodes grounded, but they are fully differential, and in many
applications the grounded inputs may be reversed (to facilitate
interfacing with signals of a particular polarity, while achieving
some desired output polarity) or both may be driven.
Figure 5.Basic Multiplier Circuit
of 32 Hz. When a tighter control of this frequency is needed, or
when the HP corner is above about 100 kHz, an external resis-
tor should be added across the pair of input nodes.
At least one of the two inputs of any pair must be provided with
a dc path (usually to ground). The careful selection of ground
returns is important in realizing the full accuracy of the AD734.
The Z2 pin will normally be connected to the load ground,
which may be remote, in some cases. It may also be used as an
optional summing input (see Equations (3) and (4), above)
having a nominal FS input of –10 V and the full 10 MHz
bandwidth.
In applications where high absolute accuracy is essential, the
scaling error caused by the finite resistance of the signal source(s)
may be troublesome; for example, a 50 W source resistance at
just one input will introduce a gain error of –0.1%; if both the
X- and Y-inputs are driven from 50 W sources, the scaling error
in the product will be –0.2%. Provided the source resistance(s)
are known, this gain error can be completely compensated by
including the appropriate resistance (50 W or 100W, respectively,
in the above cases) between the output W (Pin 12) and the Z1
feedback input (Pin 11). If Rx is the total source resistance
associated with the X1 and X2 inputs, and Ry is the total source
resistance associated with the Y1 and Y2 inputs, and neither Rx
nor Ry exceeds 1 kW, a resistance of Rx+Ry in series with pin
Z1 will provide the required gain restoration.
Pins 9 (ER) and 13 (DD) should be left unconnected in this
application. The U-inputs (Pins 3, 4 and 5) are shown
connected to ground; they may alternatively be connected to
VN, if desired. In applications where Pin 2 (X2) happens to be
driven with a high-amplitude, high-frequency signal, the
capacitive coupling to the denominator control circuitry via an
ungrounded Pin 3 can cause high-frequency distortion. However,
the AD734 can be operated without modification in an AD534
socket, and these three pins left unconnected, with the above
caution noted.
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