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AD600AR-REEL7 |AD600ARREEL7ADIN/a2avaiGain range:0 to 40dB ;+-7.5V; 600mW; daual, low noise, wideband variable gain amplifier. For ultrasound and sonar time-gain control, high performance audio and RF AGC systems and signal measurement


AD600AR-REEL7 ,Gain range:0 to 40dB ;+-7.5V; 600mW; daual, low noise, wideband variable gain amplifier. For ultrasound and sonar time-gain control, high performance audio and RF AGC systems and signal measurementAPPLICATIONSUltrasound and Sonar Time-Gain ControlThe gain-control interfaces are fully differentia ..
AD600ARZ-R7 , Dual, Low Noise, Wideband Variable Gain Amplifiers
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AD602AQ ,Dual, Low Noise, Wideband Variable Gain AmplifiersSPECIFICATIONS A S G+625 mV, R = 500 V, and C = 5 pF, unless otherwise noted.
AD602AR ,Dual, Low Noise, Wideband Variable Gain AmplifiersSpecifications for AD600 and AD602 are identical unless otherwise noted.)L LAD600J/AD602J AD600A/AD ..
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AD9883ABSTZ-110 ,Highly Integrated Graphics Interface Chip Includes Three 8-Bit/110 MSPS ADCsSPECIFICATIONSAnalog Interface (V = 3.3 V, V = 3.3 V, ADC Clock = Maximum Conversion Rate, unless o ..
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AD600AR-REEL7
Gain range:0 to 40dB ;+-7.5V; 600mW; daual, low noise, wideband variable gain amplifier. For ultrasound and sonar time-gain control, high performance audio and RF AGC systems and signal measurement
REV.B
Dual, Low Noise, Wideband
Variable Gain Amplifiers
FEATURES
Two Channels with Independent Gain Control
“Linear in dB” Gain Response
Two Gain Ranges:
AD600: 0 dB to 40 dB
AD602: –10 dB to +30 dB
Accurate Absolute Gain: �0.3 dB
Low Input Noise: 1.4 nV/√Hz
Low Distortion: –60 dBc THD at �1 V Output
High Bandwidth: DC to 35 MHz (–3 dB)
Stable Group Delay: �2 ns
Low Power: 125 mW (Max) per Amplifier
Signal Gating Function for Each Amplifier
Drives High-Speed A/D Converters
MIL-STD-883-Compliant and DESC Versions Available
APPLICATIONS
Ultrasound and Sonar Time-Gain Control
High-Performance Audio and RF AGC Systems
Signal Measurement
PRODUCT DESCRIPTION

The AD600 and AD602 dual channel, low noise variable gain
amplifiers are optimized for use in ultrasound imaging systems,
but are applicable to any application requiring very precise gain,
low noise and distortion, and wide bandwidth. Each indepen-
dent channel provides a gain of 0 dB to +40 dB in the AD600
and –10 dB to +30 dB in the AD602. The lower gain of the
AD602 results in an improved signal-to-noise ratio at the out-
put. However, both products have the same 1.4 nV/√Hz input
noise spectral density. The decibel gain is directly proportional
to the control voltage, is accurately calibrated, and is supply-
and temperature-stable.
To achieve the difficult performance objectives, a proprietary
circuit form—the X-AMP®—has been developed. Each chan-
nel of the X-AMP comprises a variable attenuator of 0 dB to
–42.14 dB followed by a high speed fixed gain amplifier. In this
way, the amplifier never has to cope with large inputs, and can
benefit from the use of negative feedback to precisely define the
gain and dynamics. The attenuator is realized as a seven-stage
R-2R ladder network having an input resistance of 100 Ω, laser-
trimmed to ±2%. The attenuation between tap points is 6.02 dB;
the gain-control circuit provides continuous interpolation between
these taps. The resulting control function is linear in dB.
The gain-control interfaces are fully differential, providing an
input resistance of ~15 MΩ and a scale factor of 32 dB/V (that
is, 31.25 mV/dB) defined by an internal voltage reference. The
response time of this interface is less than 1 µs. Each channel
also has an independent gating facility that optionally blocks
signal transmission and sets the dc output level to within a few
millivolts of the output ground. The gating control input is TTL
and CMOS compatible.
The maximum gain of the AD600 is 41.07 dB, and that of the
AD602 is 31.07 dB; the –3 dB bandwidth of both models is
nominally 35 MHz, essentially independent of the gain. The
signal-to-noise ratio (SNR) for a 1 V rms output and a 1 MHz
noise bandwidth is typically 76 dB for the AD600 and 86 dB for
the AD602. The amplitude response is flat within ±0.5 dB from
100 kHz to 10 MHz; over this frequency range the group delay
varies by less than ±2 ns at all gain settings.
Each amplifier channel can drive 100 Ω load impedances with
low distortion. For example, the peak specified output is ±2.5 V
minimum into a 500 Ω load, or ±1 V into a 100 Ω load. For a
200 Ω load in shunt with 5 pF, the total harmonic distortion for
a ±1 V sinusoidal output at 10 MHz is typically –60 dBc.
The AD600J and AD602J are specified for operation from 0°C
to 70°C, and are available in both 16-lead plastic DIP (N) and
16-lead SOIC (R). The AD600A and AD602A are specified for
operation from –40°C to +85°C and are available in both 16-lead
cerdip (Q) and 16-lead SOIC (R).
The AD600S and AD602S are specified for operation from
–55°C to +125°C and are available in a 16-lead cerdip (Q)
package and are MIL-STD-883 compliant. The AD600S and
AD602S are also available under DESC SMD 5962-94572.
FUNCTIONAL BLOCK DIAGRAM

X-AMP is a registered trademark of Analog Devices, Inc.
*Patented.
AD600/AD602–SPECIFICATIONS
NOTESTypical open or short-circuited input; noise is lower when system is set to maximum gain and input is short-circuited. This figure includes the effects of both voltage
and current noise sources.Using resistive loads of 500 Ω or greater, or with the addition of a 1 kΩ pull-down resistor when driving lower loads.The dc gain of the main amplifier in the AD600 is X113; thus an input offset of only 100 µV becomes an 11.3 mV output offset. In the AD602, the amplifier’s gain is
X35.7; thus, an input offset of 100 µV becomes a 3.57 mV output offset.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
(Each amplifier section, at TA = 25�C, VS = �5 V, –625 mV ≤ VG ≤
+625 mV, RL = 500 �, and CL = 5 pF, unless otherwise noted. Specifications for AD600 and AD602 are identical unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS1
SupplyVoltage ±VS . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7.5V
Input Voltages
Pins 1, 8, 9, 16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Pins 2, 3, 6, 7 . . . . . . . . . . . . . . . . . . . . . . ±2 V Continuous
. . . . . . . . . . . . . . . . . . . . . . . . . ±VS for 10 ms
Pins 4, 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
InternalPowerDissipation2 . . . . . . . . . . . . . . . . . . . . 600 mW
Operating Temperature Range (J) . . . . . . . . . . . . 0°C to 70°C
Operating Temperature Range (A) . . . . . . . . –40°C to +85°C
Operating Temperature Range (S) . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering60sec) . . . . . . . . . 300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Thermal Characteristics:
16-Lead Plastic Package: θJA = 85°C/W
16-Lead SOIC Package: θJA = 100°C/W
16-Lead Cerdip Package: θJA = 120°C/W
ORDERING GUIDE

AD600AR
AD600AR-REEL
AD600AR-REEL7
AD600JN
AD600JR
AD600JR-REEL
AD600JR-REEL7
AD600SQ/883B
AD602AQ
AD602AR
AD602AR-REEL
AD602AR-REEL7
AD602JN
AD602JR
AD602JR-REEL
AD602JR-REEL7
NOTESN = Plastic DIP; Q = Cerdip; R = Small Outline IC (SOIC).Refer to AD600/AD602 Military data sheet. Also available as 5962-9457201MEA.Refer to AD600/AD602 Military data sheet. Also available as 5962-9457202MEA.
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD600/AD602 features proprietary ESD protection circuitry, permanent damage may occur on
PIN FUNCTION DESCRIPTIONS
CONNECTION DIAGRAM
16-Lead Plastic DIP (N) Package
16-Lead Plastic SOIC (R) Package
16-Lead Cerdip (Q) Package
TPC 1.Gain Error vs. Gain Control
Voltage
TPC 4.AD600 and AD602 Typical
Group Delay vs. VC
TPC 7.Input Impedance vs.
Frequency
TPC 2.AD600 Frequency and Phase
Response vs. Gain
TPC 5. Third Order Intermodula-
tion Distortion, VOUT = 2 V p-p,
RL = 500 Ω
TPC 8.Output Offset vs. Gain
Control Voltage (Control Channel
Feedthrough)
TPC 3.AD602 Frequency and Phase
Response vs. Gain
TPC 6.Typical Output Voltage vs.
Load Resistance (Negative Output
Swing Limits First)
TPC 9.Gain Control Channel
Response Time. Top: Output Volt-
age, 2 V max, Bottom: Gain Con-
trol Voltage VC = ±625 mV
AD600/AD602–Typical Performance Characteristics
TPC 10.Gating Feedthrough to
Output, Gating Off to On
TPC 13.Input Stage Overload
Recovery Time
TPC 16.CMRR vs. Frequency
TPC 11.Gating Feedthrough to
Output, Gating On to Off
TPC 14.Output Stage Overload
Recovery Time
TPC 17.PSRR vs. Frequency
TPC 12.Transient Response,
Medium and High Gain
TPC 15. Transient Response
Minimum Gain
TPC 18. Crosstalk Between A1
and A2 vs. Frequency
AD600/AD602
THEORY OF OPERATION

The AD600 and AD602 have the same general design and
features. They comprise two fixed gain amplifiers, each pre-
ceded by a voltage-controlled attenuator of 0 dB to 42.14 dB
with independent control interfaces, each having a scaling factor
of 32 dB per volt. The gain of each amplifier in the AD600 is
laser trimmed to 41.07 dB (X113), thus providing a control
range of –1.07 dB to 41.07 dB (0 dB to 40 dB with overlap),
while the AD602 amplifiers have a gain of 31.07 dB (X35.8)
and provide an overall gain of –11.07 dB to 31.07 dB (–10 dB to
30 dB with overlap).
The advantage of this topology is that the amplifier can use
negative feedback to increase the accuracy of its gain; also, since
the amplifier never has to handle large signals at its input, the
distortion can be very low. A further feature of this approach is
that the small-signal gain and phase response, and thus the
pulse response, are essentially independent of gain.
The following discussion describes the AD600. Figure 1 is a
simplified schematic of one channel. The input attenuator is a
seven-section R-2R ladder network, using untrimmed resistors
of nominally R = 62.5 Ω, which results in a characteristic resis-
tance of 125 Ω ± 20%. A shunt resistor is included at the input
and laser trimmed to establish a more exact input resistance of
100 Ω ± 2%, which ensures accurate operation (gain and HP
corner frequency) when used in conjunction with external resis-
tors or capacitors.
Figure 1. Simplified Block Diagram of Single Channel of
the AD600 and AD602
The nominal maximum signal at input A1HI is 1 V rms (±1.4 V
peak) when using the recommended ±5 V supplies, although
operation to ±2 V peak is permissible with some increase in HF
distortion and feedthrough. Each attenuator is provided with a
separate signal “LO” connection, for use in rejecting common-
mode, the voltage between input and output grounds. Circuitry
is included to provide rejection of up to ±100 mV.
The signal applied at the input of the ladder network is attenu-
ated by 6.02 dB by each section; thus, the attenuation to each of
the taps is progressively 0, 6.02, 12.04, 18.06, 24.08, 30.1, 36.12
and 42.14 dB. A unique circuit technique is employed to interpo-
late between these tap points, indicated by the “slider” in Figure
1, providing continuous attenuation from 0 dB to 42.14 dB.
It will help, in understanding the AD600, to think in terms of a
mechanical means for moving this slider from left to right; in
fact, it is voltage controlled. The details of the control interface
are discussed later. Note that the gain is at all times exactly
determined, and a linear decibel relationship is automatically
guaranteed between the gain and the control parameter which
determines the position of the slider. In practice, the gain devi-
ates from the ideal law, by about ±0.2 dB peak (see, for example,
Figure 6).
Note that the signal inputs are not fully differential: A1LO and
A1CM (for CH1) and A2LO and A2CM (for CH2) provide
separate access to the input and output grounds. This recog-
nizes the practical fact that even when using a ground plane,
small differences will arise in the voltages at these nodes. It is
important that A1LO and A2LO be connected directly to the
input ground(s); significant impedance in these connections will
reduce the gain accuracy. A1CM and A2CM should be con-
nected to the load ground(s).
Noise Performance

An important reason for using this approach is the superior
noise performance that can be achieved. The nominal resistance
seen at the inner tap points of the attenuator is 41.7 Ω (one third
of 125 Ω), which exhibits a Johnson noise spectral density (NSD)
of 0.84 nV/√Hz (that is, √4kTR) at 27°C, which is a large fraction
of the total input noise. The first stage of the amplifier contrib-
utes a further 1.12 nV/√Hz, for a total input noise of 1.4 nV/√Hz.
The noise at the 0 dB tap depends on whether the input is
short-circuited or open-circuited: when shorted, the minimum
NSD of 1.12 nV/√Hz is achieved; when open, the resistance
of 100 Ω at the first tap generates 1.29 nV/√Hz, so the noise
increases to a total of 1.71 nV/√Hz. (This last calculation would
be important if the AD600 were preceded, for example, by a
900 Ω resistor to allow operation from inputs up to ±10 V rms.
However, in most cases the low impedance of the source will
limit the maximum noise resistance.)
It will be apparent from the foregoing that it is essential to use a
low resistance in the design of the ladder network to achieve low
noise. In some applications this may be inconvenient, requiring
the use of an external buffer or preamplifier. However, very few
amplifiers combine the needed low noise with low distortion at
maximum input levels, and the power consumption needed to
achieve this performance is fundamentally required to be quite
high (due to the need to maintain very low resistance values
while also coping with large inputs). On the other hand, there is
little value in providing a buffer with high input impedance,
since the usual reason for this—the minimization of loading of a
high resistance source—is not compatible with low noise.
Apart from the small variations just discussed, the signal-to-
noise (S/N) ratio at the output is essentially independent of the
attenuator setting, since the maximum undistorted output is 1 V
rms and the NSD at the output of the AD600 is fixed at 113
times 1.4 nV/√Hz, or 158 nV/√Hz. Thus, in a 1 MHz bandwidth,
the output S/N ratio would be 76 dB. The input NSD of the
AD600 and AD602 are the same, but because of the 10 dB
lower gain in the AD602’s fixed amplifier, its output S/N ratio is
10 dB better, or 86 dB in a 1 MHz bandwidth.
The Gain-Control Interface
The attenuation is controlled through a differential, high imped-
ance (15 MΩ) input, with a scaling factor which is laser trimmed
to 32 dB per volt, that is, 31.25 mV/dB. Each of the two amplifiers
has its own control interface. An internal bandgap reference
ensures stability of the scaling with respect to supply and tempera-
ture variations, and is the only circuitry common to both channels.
When the differential input voltage VG = 0 V, the attenuator
“slider” is centered, providing an attenuation of 21.07 dB, thus
resulting in an overall gain of 20 dB (= –21.07 dB + 41.07 dB).
When the control input is –625 mV, the gain is lowered by
20 dB (= 0.625 × 32), to 0 dB; when set to +625 mV, the gain
is increased by 20 dB, to 40 dB. When this interface is over-
driven in either direction, the gain approaches either –1.07 dB
(= –42.14 dB + 41.07 dB) or 41.07 dB (= 0 + 41.07 dB),
respectively.
The gain of the AD600 can thus be calculated using the follow-
ing simple expression:
Gain (dB) = 32 VG + 20(1)
where VG is in volts. For the AD602, the expression is:
Gain (dB) = 32 VG + 10(2)
Operation is specified for VG in the range from –625 mV dc
to +625 mV dc. The high impedance gain-control input ensures
minimal loading when driving many amplifiers in multiple- channel
applications. The differential input configuration provides flexibil-
ity in choosing the appropriate signal levels and polarities for
various control schemes.
For example, the gain-control input can be fed differentially to
the inputs, or single-ended by simply grounding the unused
input. In another example, if the gain is to be controlled by a
DAC providing a positive only ground referenced output, the
“Gain Control LO” pin (either C1LO or C2LO) should be
biased to a fixed offset of +625 mV, to set the gain to 0 dB
when “Gain Control HI” (C1HI or C2HI) is at zero, and to
40 dB when at 1.25 V.
It is a simple matter to include a voltage divider to achieve other
scaling factors. When using an 8-bit DAC having a FS output of
+2.55 V (10 mV/bit) a divider ratio of 1.6 (generating 6.25 mV/
bit) would result in a gain setting resolution of 0.2 dB/ bit. Later,
we will discuss how the two sections of an AD600 or AD602
may be cascaded, when various options exist for gain control.
Signal-Gating Inputs
Each amplifier section of the AD600 and AD602 is equipped

with a signal gating function, controlled by a TTL or CMOS
logic input (GAT1 or GAT2). The ground references for these
inputs are the signal input grounds A1LO and A2LO, respec-
tively. Operation of the channel is unaffected when this input is
LO or left open-circuited. Signal transmission is blocked when
this input is HI. The dc output level of the channel is set to
within a few millivolts of the output ground (A1CM or A2CM),
and simultaneously the noise level drops significantly. The
reduction in noise and spurious signal feedthrough is useful
in ultrasound beam-forming applications, where many amplifier
outputs are summed.
Common-Mode Rejection

A special circuit technique is used to provide rejection of volt-
ages appearing between input grounds (A1LO and A2LO) and
output grounds (A1CM and A2CM). This is necessary because
of the “op amp” form of the amplifier, as shown in Figure 1.
The feedback voltage is developed across the resistor RF1 (which,
to achieve low noise, has a value of only 20 Ω). The voltage
developed across this resistor is referenced to the input common,
so the output voltage is also referred to that node.
To provide rejection of this common voltage, an auxiliary ampli-
fier (not shown) is included, which senses the voltage difference
between input and output commons and cancels this error com-
ponent. Thus, for zero differential signal input between A1HI
and A1LO, the output A1OP simply follows the voltage at A1CM.
Note that the range of voltage differences which can exist between
A1LO and A1CM (or A2LO and A2CM) is limited to about
±100 mV. Figure 50 (one of the typical performance curves at
the end of this data sheet) shows typical common-mode rejec-
tion ratio versus frequency.
ACHIEVING 80 dB GAIN RANGE

The two amplifier sections of the X-AMP can be connected
in series to achieve higher gain. In this mode, the output of
A1 (A1OP and A1CM) drives the input of A2 via a high-pass
network (usually just a capacitor) that rejects the dc offset. The
nominal gain range is now –2 dB to +82 dB for the AD600 or
–22 dB to +62 dB for the AD602.
There are several options in connecting the gain-control inputs.
The choice depends on the desired signal-to-noise ratio (SNR)
and gain error (output ripple). The following examples feature
the AD600; the arguments generally apply to the AD602, with
appropriate changes to the gain values.
Sequential Mode (Maximum S/N Ratio)
In the sequential mode of operation, the SNR is maintained at

its highest level for as much of the gain control range possible,
as shown in Figure 2. Note here that the gain range is 0 dB to
80 dB. Figure 3 shows the general connections to accomplish
this. Both gain-control inputs, C1HI and C2HI, are driven in
parallel by a positive only, ground referenced source with a
range of 0 V to 2.5 V.
AD600/AD602
The gains are offset (Figure 4) such that A2’s gain is increased
only after A1’s gain has reached its maximum value. Note that
for a differential input of –700 mV or less, the gain of a single
amplifier (A1 or A2) will be at its minimum value of –1.07 dB;
for a differential input of +700 mV or more, the gain will be at
its maximum value of 41.07 dB. Control inputs beyond these
limits will not affect the gain and can be tolerated without dam-
age or foldover in the response. See the Specifications Section of
this data sheet for more details on the allowable voltage range.
The gain is now
Gain (dB) = 32 VC(3)
where VC is the applied control voltage.
Figure 4.Explanation of Offset Calibration for Sequential
Control
When VC is set to zero, VG1 = –0.592 V and the gain of A1 is
+1.07 dB (recall that the gain of each amplifier section is 0 dB
for VG = 625 mV); meanwhile, VG2 = –1.908 V so the gain of
A2 is –1.07 dB. The overall gain is thus 0 dB (see Figure 3a).
When VC = +1.25 V, VG1 = 1.25 V– 0.592 V = +0.658 V, which
sets the gain of A1 to 40.56 dB, while VG2 = 1.25 V – 1.908 V =
–0.658 V, which sets A2’s gain at –0.56 dB. The overall gain is
now 40 dB (see Figure 3b). When VC = +2.5 V, the gain of A1
is 41.07 dB and that of A2 is 38.93 dB, resulting in an overall
gain of 80 dB (see Figure 3c). This mode of operation is further
clarified by Figure 5, which is a plot of the separate gains of A1
and A2 and the overall gain versus the control voltage. Figure 6
is a plot of the gain error of the cascaded amplifiers versus the
control voltage.
Parallel Mode (Simplest Gain-Control Interface)

In this mode, the gain-control voltage is applied to both inputs
in parallel—C1HI and C2HI are connected to the control volt-
age, and C1LO and C2LO are optionally connected to an offset
voltage of 0.625 V. The gain scaling is then doubled to 64 dB/V,
requiring only 1.25 V for an 80 dB change of gain. The ampli-
tude of the gain ripple in this case is also doubled, as shown in
Figure 7, and the instantaneous signal-to-noise ratio at the
output of A2 decreases linearly as the gain is increased (Figure 8).
Low Ripple Mode (Minimum Gain Error)

As can be seen in Figures 6 and 7, the output ripple is periodic.
By offsetting the gains of Al and A2 by half the period of the
ripple, or 3 dB, the residual gain errors of the two amplifiers
can be made to cancel. Figure 9 shows the much lower gain rip
ple when configured in this manner. Figure 10 plots the S/N
ratio as a function of gain; it is very similar to that in the
“Parallel Mode.”
Figure 3.AD600 Gain Control Input Calculations for Sequential Control Operation
Figure 5. Plot of Separate and Overall Gains in Sequential
Control
Figure 6.Gain Error for Cascaded Stages—Sequential
Control
Figure 7. Gain Error for Cascaded Stages—Parallel
Figure 8.SNR for Cascaded Stages—Parallel Control
Figure 9.Gain Error for Cascaded Stages—Low Ripple
Mode
Figure 10.ISNR vs. Control Voltage—Low Ripple Mode
AD600/AD602
APPLICATIONS

The full potential of any high performance amplifier can only be
realized by careful attention to details in its applications. The
following pages describe fully tested circuits in which many such
details have already been considered. However, as is always true
of high accuracy, high speed analog circuits, the schematic is
only part of the story; this is no less true for the AD600 and
AD602. Appropriate choices in the overall board layout and the
type and placement of power supply decoupling components are
very important. As explained previously, the input grounds
A1LO and A2LO must use the shortest possible connections.
The following circuits show examples of time-gain control for
ultrasound and for sonar, methods for increasing the output
drive, and AGC amplifiers for audio and RF/IF signal process-
ing using both peak and rms detectors. These circuits also
illustrate methods of cascading X-AMPs for either maintaining
the optimal S/N ratio or maximizing the accuracy of the gain-
control voltage for use in signal measurement. These AGC
circuits may be modified for use as voltage-controlled amplifiers
for use in sonar and ultrasound applications by removing the
detector and substituting a DAC or other voltage source for
supplying the control voltage.
Time-Gain Control (TGC) and Time-Variable Gain (TVG)

Ultrasound and sonar systems share a similar requirement: both
need to provide an exponential increase in gain in response to a
linear control voltage, that is, a gain control that is “linear in
dB.” Figure 11 shows the AD600/AD602 configured for a con-
trol voltage ramp starting at –625 mV and ending at +625 mV
for a gain-control range of 40 dB. For simplicity, only the A1
connections are shown. The polarity of the gain-control voltage
may be reversed and the control voltage inputs C1HI and C1LO
reversed to achieve the same effect. The gain-control voltage
can be supplied by a voltage-output DAC such as the AD7242,
which contains two complete DACs, operates from ±5 V supplies,
has an internal reference of 3 V, and provides ±3 V of output
swing. As such it is well-suited for use with the AD600/AD602,
needing only a few resistors to scale the output voltage of the
DACs to the levels needed by the AD600/AD602.
Figure 11.The Simplest Application of the X-AMP Is as a
Increasing Output Drive

The AD600/AD602’s output stage has limited capability for
negative-load driving capability. For driving loads less than
500 Ω, the load drive may be increased by about 5 mA by con-
necting a 1 kΩ pull-down resistor from the output to the negative
supply (Figure 12).
Driving Capacitive Loads

For driving capacitive loads of greater than 5 pF, insert a 10 Ω
resistor between the output and the load. This lowers the possi-
bility of oscillation.
Figure 12. Adding a 1 kΩ Pull-Down Resistor Increases the
X-AMP’s Output Drive by About 5 mA. Only the A1 Con-
nections Are Shown for Simplicity.
Realizing Other Gain Ranges

Larger gain ranges can be accommodated by cascading amplifi-
ers. Combinations built by cascading two amplifiers include
–20 dB to +60 dB (using one AD602), –10 dB to +70 dB (1/2
of an AD602 followed by 1/2 of an AD600), and 0 dB to 80 dB
(one AD600). In multiple-channel applications, extra protection
against oscillations can be provided by using amplifier sections
from different packages.
An Ultralow Noise VCA

The two channels of the AD600 or AD602 may be operated in
parallel to achieve a 3 dB improvement in noise level, providing
1 nV/√Hz without any loss of gain accuracy or bandwidth.
In the simplest case, as shown in Figure 13, the signal inputs
A1HI and A2HI are tied directly together, the outputs A1OP
and A2OP are summed via R1 and R2 (100 Ω each), and the
control inputs C1HI/C2HI and C1LO/C2LO operate in parallel.
Using these connections, both the input and output resistances
are 50 Ω. Thus, when driven from a 50 Ω source and termi-
nated in a 50 Ω load, the gain is reduced by 12 dB, so the gain
range becomes –12 dB to +28 dB for the AD600 and –22 dB to
+18 dB for the AD602. The peak input capability remains unaf-
fected (1 V rms at the IC pins, or 2 V rms from an unloaded
50 Ω source). The loading on each output, with a 50 Ω load, is
effectively 200 Ω, because the load current is shared between
the two channels, so the overall amplifier still meets its specified
maximum output and distortion levels for a 200 Ω load. This
amplifier can deliver a maximum sine wave power of +10 dBm
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