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AD22050NADN/a40avaiSingle-Supply Sensor Interface Amplifier
AD22050RADN/a300avaiSingle-Supply Sensor Interface Amplifier


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AD22050N-AD22050R
Single-Supply Sensor Interface Amplifier
FUNCTIONAL BLOCK DIAGRAM
REV.CSingle-Supply Sensor
Interface Amplifier
GENERAL DESCRIPTION

The AD22050 is a single-supply difference amplifier for ampli-
fying and low-pass filtering small differential voltages (typically
100 mV FS at a gain of 40) from sources having a large common-
mode voltage.
Supply voltages from +3.0 V to +36 V can be used. The input
common-mode range extends from below ground to +24V using
FEATURES
Gain of 320. Alterable from 31 to 3160
Input CMR from Below Ground to 63 (VS – 1 V)
Output Span 20 mV to (VS – 0.2) V
1-, 2-, 3-Pole Low-Pass Filtering Available
Accurate Midscale Offset Capability
Differential Input Resistance 400 kV
Drives 1 kV Load to +4 V Using VS = +5 V
Supply Voltage: +3.0 V to +36 V
Transient Spike Protection and RFI Filters Included
Peak Input Voltage (40 ms): 60 V
Reversed Supply Protection: –34 V
Operating Temperature Range: –408C to +1258C
APPLICATIONS
Current Sensing
Motor Control
Interface for Pressure Transducers, Position Indicators,
Strain Gages, and Other Low Level Signal Sources

a +5 V supply with excellent rejection of this common-mode
voltage. This is achieved by the use of a special resistive attenua-
tor at the input, laser trimmed to a very high differential balance.
Provisions are included for optional low-pass filtering and gain
adjustment. An accurate midscale offset feature allows bipolar
signals to be amplified.
SINGLE-POLE LOW-PASS FILTERING, GAIN: 40
POWER
DARLINGTON
100mV200kV
+5V
ANALOG OUTPUT
4V PER AMP
CORNER FREQUENCY
= 0.796Hz-mF
ANALOG GROUND
SOLENOID
LOAD
+VS (CAR BATTERY)
CMOS DRIVER
CHASSIS

Figure 1.Typical Application Circuit for a Current Sensor Interface
ORDERING GUIDE
*Quantities must be in increments of 2,500 pieces each.
AD22050–SPECIFICATIONS
(TA = +258C, VS = +5 V, and VCM = 0, RL = 10 kV unless otherwise noted)

OVERALL SYSTEM
NOTESSpecified for default mode, i.e., with no external components. The overall gain is trimmed to 0.5%, while the individual gains of A1 and A2 may be subject to a
maximum –3% tolerance. Note that the actual gain in a particular application can be modified by the use of external resistor networks.The actual output resistance of A1 is only a few ohms, but access to this output, via Pin 3, is always through the resistor R12 (see Figure 16) which is 100kW,
trimmed to –3%.For VCM £ 20 V. For VCM > 20 V, VOL @ 1 mV/V · VCM.Referred to the input (Pins 1 and 8).With VDM = 0 V. Differential mode signals are referred to as VDM, while VCM refers to common-mode voltages—see the section Product Description and Figure 3.
All min and max specifications are guaranteed, although only those marked in boldface are tested on all production units at final test.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . +3.0 V to +36 V
Peak Input Voltage (40 ms) . . . . . . . . . . . . . . . . . . . . . . +60 V
VOFS (Pin 7 to Pin 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . .+20 V
Reversed Supply Voltage Protection . . . . . . . . . . . . . . . –34 V
Operating Temperature . . . . . . . . . . . . . . . . –40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; the functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
PIN CONFIGURATIONS
Plastic Mini-DIP Package
(N-8)
Plastic SOIC Package
(SO-8)
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD22050 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PRODUCT DESCRIPTION

The AD22050 is a single-supply difference amplifier consisting
of a precision balanced attenuator, a very low drift preamplifier
and an output buffer amplifier (A1 and A2, respectively, in
Figure 2). It has been designed so that small differential sig-
nals (VDM in Figure 3) can be accurately amplified and filtered
in the presence of large common-mode voltages (VCM) without
the use of any other active components.
OUT
GND
IN+
IN–
+VSOFSA1A2

Figure 2.Simplified Schematic
The resistive attenuator network is situated at the input to the
AD22050 (Pins 1 and 8), allowing the common-mode voltage at
Pins 1 and 8 to be six times greater than that which can be toler-
ated by the actual input to A1. As a result, the input common-
mode range extends to 6· (VS – 1 V).
Two small filter capacitors (not shown in Figure 2) have been
included at the inputs of A1 to minimize the effects of any spuri-
ous RF signals present in the signal.
Internal feedback around A1 sets the closed-loop gain of the
preamplifier to ·10 from the input pins; the output of A1 is
connected to Pin 3 via a 100 kW resistor, which is trimmed to3% (R12 in Figure 2) to facilitate the low-pass filtering of the
signal of interest (see Low-Pass Filtering section). The inclusion
(Pin 6), permitting the conditioning and processing of bipolar
signals (see Strain Gage Interface section).
The output buffer A2 has a gain of ·2, setting the precalibrated,
overall gain of the AD22050, with no external components, to20. (This gain is easily user-configurable—see Altering the
Gain section for details.)
The dynamic properties of the AD22050 are optimized for
interfacing to transducers; in particular, current sensing shunt
resistors. Its rejection of large, high frequency, common-mode
signals makes it superior to that of many alternative approaches.
This is due to the very careful design of the input attenuator and
the close integration of this highly balanced, high impedance
system with the preamplifier.
APPLICATIONS

The AD22050 can be used wherever a high gain, single-supply
differencing amplifier is required, and where a finite input resis-
tance (240 kW to ground, 400 kW between differential inputs)
can be tolerated. In particular, the ability to handle a common-
mode input considerably larger than the supply voltage is fre-
quently of value.
Also, the output can run down to within 20 mV of ground,
provided it is not called on to sink any load current. Finally, the
output can be offset to half of a full-scale reference voltage (with
a tolerance of –2%) to allow a bipolar input signal.
ALTERING THE GAIN

The gain of the preamplifier, from the attenuator input (Pins 1
and 8) to its output at Pin 3, is ·10 and that of the output
buffer, from Pin 4 to Pin 5, is ·2, thus making the overall de-
fault gain ·20. The overall gain is accurately trimmed (to within0.5%). In some cases, it may be desirable to provide for some
variation in the gain; for example, in absorbing the scaling error
of a transducer.
–IN
GND
+IN
OFFSET
+VS
OUTA2
AD22050
is given by (10 MW/R)%. Thus, the adjustment range would be2% for R = 5 MW; – 10% for R = 1 MW, etc.
Figure 3.Altering Gain to Accommodate Transducer
Scaling Error
In addition to the method above, another method may be used
to vary the gain. Many applications will call for a gain higher
than ·20, and some require a lower gain. Both of these situa-
tions are readily accommodated by the addition of one external
resistor, plus an optional potentiometer if gain adjustment is
required (for example, to absorb a calibration error in a trans-
ducer).
Decreasing the Gain. See Figure 4. Since the output of the

preamplifier has an output resistance of 100 kW, an external
resistor connected from Pin 4 to ground will precisely lower the
gain by a factor R/(100k+R). When configuring the AD22050
for any gain, the maximum input and the power supply being
used should be considered, since either the preamplifier or the
output buffer will reach its full-scale output (approximately
VS – 0.2 V) with large differential input voltages. The input of
the AD22050 is limited to no greater than (V – 0.2)/10, for
overall gains less than 10, since the preamplifier, with its fixed
gain of ·10, reaches its full scale output before the output
buffer. For VS = 5 V this is 0.48 V. For gains greater than 10,
however, the swing at the buffer output reaches its full-scale first
and limits the AD22050 input to (VS – 0.2)/G, where G is the
overall gain. Increasing the power supply voltage increases the
allowable maximum input. For VS = 5 V and a nominal gain of
20, the maximum input is 240 mV.
The overall bandwidth is unaffected by changes in gain using
this method, although there may be a small offset voltage due to
the imbalance in source resistances at the input to A2. In many
cases this can be ignored but, if desired, can be nulled by insert-
ing a resistor in series with Pin 4 (at “Point X” in Figure 4) of
value 100 kW minus the parallel sum of R and 100 kW. For
example, with R = 100 kW (giving a total gain of ·10), the op-
tional offset nulling resistor is 50 kW.
VDM
VCMR
ANALOG
OUTPUT
ANALOG
COMMON
POINT X
(SEE TEXT)
GAIN = ––––––––20R
R + 100k
R = 100k –––––––––GAIN
20 – GAIN

now multiplied by the factor R/(R–100k); for example, it is
doubled for R = 200 kW. Overall gains of up to ·160 (R = 114kW)
are readily achievable in this way. Note, however, that the accu-
racy of the gain becomes critically dependent on resistor value at
high gains. Also, the effective input offset voltage at Pins 1 and
8 (about six times the actual offset of A1) limits the part’s use in
very high gain, dc-coupled applications. The gain may be trimmed
by using a fixed and variable resistor in series (see, for example,
Figure 10).
Figure 5. Achieving Gains Greater Than ·20
Once again, a small offset voltage will arise from an imbalance
in source resistances and the finite bias currents inherently
present at the input of A2. In most applications this additional
offset error (about 130mV at ·40) will be comparable with the
specified offset range and will therefore introduce negligible
skew. It may, however, be essentially eliminated by the addition
of a resistor in series with the parallel sum of R and 100 kW
(i.e., at “Point X” in Figure 5) so the total series resistance is
maintained at 100 kW. For example, at a gain of ·30, when
R = 300kW and the parallel sum of R and 100 kW is 75 kW, the
padding resistor should be 25 kW. A 50 kW pot would provide
an offset range of about –2.25 mV referred to the output, or75mV referred to the attenuator input. A specific example is
shown in Figure 12.
LOW-PASS FILTERING

In many transducer applications it is necessary to filter the sig-
nal to remove spurious high frequency components, including
noise, or to extract the mean value of a fluctuating signal with a
peak-to-average ratio (PAR) greater than unity. For example, a
full wave rectified sinusoid has a PAR of 1.57, a raised cosine
has a PAR of 2 and a half wave sinusoid has a PAR of 3.14.
Signals having large spikes may have PARs of 10 or more.
When implementing a filter, the PAR should be considered so
the output of the AD22050 preamplifier (A1) does not clip
before A2 does, since this nonlinearity would be averaged and
appear as an error at the output. To avoid this error both ampli-
fiers should be made to clip at the same time. This condition is
achieved when the PAR is no greater than the gain of the second
amplifier (2 for the default configuration). For example, if a
PAR of 5 is expected, the gain of A2 should be increased to 5.
Low-pass filters can be implemented in several ways using the
features provided by the AD22050. In the simplest case, a
single-pole filter (20 dB/decade) is formed when the output of
A1 is connected to the input of A2 via the internal 100 kW resis-
tor by strapping Pins 3 and 4, and a capacitor added from this
node to ground, as shown in Figure 6. The dc gain remains ·20,
and the gain trim shown in Figure 3 may still be used. If a resis-
ANALOG
OUTPUT
ANALOG
COMMON1
2pC 3 100k

Figure 6.Connections for Single-Pole, Low-Pass Filter
If the gain is raised using a resistor, as shown in Figure 5, the
corner frequency is lowered by the same factor as the gain is
raised. Thus, using a resistor of 200 kW (for which the gain
would be doubled) the corner frequency is now 0.796 Hz-mF,
(0.039 mF for a 20 Hz corner).
VDM
VCM
ANALOG
OUTPUT
ANALOG
COMMON
CORNER
FREQUENCY = 1Hz-mF
255kV

Figure 7.Connections for Conveniently Scaled, Two-Pole,
Low-Pass Filter
A two-pole filter (with a roll-off of 40 dB/decade) can be imple-
mented using the connections shown in Figure 7. This is a
Sallen & Key form based on a ·2 amplifier. It is useful to remem-
ber that a two-pole filter with a corner frequency f2 and a
one-pole filter with a corner at f1 have the same attenuation at
the frequency (f22/f1). The attenuation at that frequency isLog(f2/f1). This is illustrated in Figure 8. Using the standard
resistor value shown, and equal capacitors (in Figure 7), the
corner frequency is conveniently scaled at 1 Hz-mF (0.05mF for
a 20Hz corner). A maximally flat response occurs when the
resistor is lowered to 196 kW and the scaling is then 1.145 Hz-F. The output offset is raised by about 4 mV (equivalent to
200mV at the input pins).
Figure 8.Comparative Responses of One- and Two-Pole
Low-Pass Filters
A three-pole filter (with roll-off 60 dB/decade) can be formed by
adding a passive RC network at the output forming a real pole.
A three-pole filter with a corner frequency f3 has the same
attenuation a one-pole filter of corner f1 has at a frequency
√f33/f1, where the attenuation is 30 Log (f3/f1) (see the graph in
Figure 9). Using equal capacitor values, and a resistor of
160kW, the corner-frequency calibration remains 1 Hz-mF.
Figure 9.Comparative Responses of One- and Three-Pole
Low-Pass Filters
CURRENT SENSOR INTERFACE

A typical automotive application making use of the large
common-mode range is shown in Figure 10.
Figure 10.Current Sensor Interface. Gain Is ·40, Single-
Pole Low-Pass Filtering
The current in a load, here shown as a solenoid, is controlled by
a power transistor that is either cut off or saturated by a pulse at
its base; the duty-cycle of the pulse determines the average
current. This current is sensed in a small resistor. The aver-
age differential voltage across this resistor is typically 100 mV,
although its peak value will be higher by an amount that
depends on the inductance of the load and the control fre-
quency. The common-mode voltage, on the other hand, extends
from roughly 1 V above ground, when the transistor is satu-
rated, to about 1.5 V above the battery voltage, when the tran-
sistor is cut off and the diode conducts.
If the maximum battery voltage spikes up to +20V, the common-
mode voltage at the input can be as high as 21.5 V. This can be
measured using even a +5 V supply for the AD22050.
AD22050
To produce a full-scale output of +4 V, a gain ·40 is used, adjust-
able by –5% to absorb the tolerance in the sense resistor. There is
sufficient headroom to allow at least a 10% overrange (to +4.4 V).
The roughly triangular voltage across the sense resistor is aver-
aged by a single-pole low-pass filter, here set with a corner fre-
quency of fC = 3.6 Hz, which provides about 30 dB of attenuation
at 100 Hz. A higher rate of attenuation can be obtained by a
two-pole filter having fC = 20 Hz, as shown in Figure 11. Al-
though this circuit uses two separate capacitors, the total capaci-
tance is less than half that needed for the single-pole filter.
DARLINGTON
CMOS DRIVER
+VS (BATTERY)
+5V
ANALOG
OUTPUT
ANALOG
COMMON

Figure 11.Illustration of Two-Pole Low-Pass Filtering
STRAIN GAGE INTERFACE: MIDSCALE OFFSET
FEATURE

The AD22050 can be used to interface a strain gage to a subse-
quent process where only a single supply voltage is available. In
this application, the midscale offset feature is valuable, since the
output of the bridge may have either polarity. Figure 12 shows
typical connections.
10kV
+VS
ANALOG OUTPUT
ANALOG COMMON
100kV
VOS NULL
OPTIONAL
LP FILTER
125kV
(SETS GAIN
TO 3 100)

Figure 12. Typical Connections for a Strain Gage Interface
Using the Offset Feature
The offset is obtained by connecting Pin 7 (OFS) to the supply
voltage. In this way, the output of the AD22050 is centered to
midway between the supply and ground. In many systems the
supply will also serve as the reference voltage for a subsequent
A/D converter. Alternatively, Pin 7 may be tied to the reference
voltage from an independent source. The AD22050 is trimmed
to guarantee an accuracy of –2% on the 0.5 ratio between the
voltage on Pin 7 and the output.
An ac excitation of up to –2 V can also be used because the
common-mode range of the AD22050 extends to –1 V. Assum-
ing a full-scale bridge output (VG) of –10 mV, a gain of ·100
might be used to provide an output of –1V (a full-scale range
of +1.5 V to +3.5 V). This gain is achieved using the method
discussed in connection with Figure 5. Note that the gain-
setting resistor does not affect the accuracy of the midscale
offset. (However, if the gain were lowered, using a resistor to
ground, this offset would no longer be accurate.) A VOS nulling
pot is included for illustrative purposes. One-, two- and three-
pole filtering can also be implemented, as discussed in the
Low-Pass Filtering section.
Using the Midscale Offset Feature

Figure 13 shows a more detailed schematic of the output am-
plifier A2. Because this is a single supply device, the output
stage has no pull-down transistor. Such a transistor would limit
the minimum output to several hundred millivolts above
ground. When using the AD22050 in unipolar mode (Pin 7
grounded), the resistors making up the feedback network also
act as a pull-down for the output stage.
Figure 13.Detailed Schematic of Output Amplifier A2
If the output is called upon to source current (not sink), then it
can swing almost completely to ground (within 20 mV). How-
ever, if the offset pin is connected to some positive voltage
source, this source will “pull up” the output voltage, thereby
limiting the minimum output swing. With no external load the
minimum output voltage possible is VOFS/2. For example, if Pin
7 is connected to +5 V, the minimum output voltage is equal
to the offset voltage of 2.5 V. By adding an additional load, as
shown, the output swing toward ground can be extended.
The relationship is described by:
*This 20 kW resistor is internal to the AD22050 and can vary by –30%.
where RL is an externally applied load resistor. However, RL
cannot be made arbitrarily small since this would require exces-
sive current from the output. The output current should be
limited to 5 mA total.
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