SN54HC4040J ,Asynchronous 12-Bit Binary Countersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HC42J ,4-Line To 10-Line Decoders BCD To Decimalmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HC540J ,Octal Buffers And Line Drivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HC541J ,Octal Buffers And Line Drivers With 3-State OutputsLogic Diagram (Positive Logic)1OE119OE22 18A1Y1ToSevenOtherChannelsCopyright 2016, Texas Instrumen ..
SN54HC563J , OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54HC573AJ ,Octal D-type Transparent Latches With 3-State OutputsFeatures 3 DescriptionThe SNx4HC573A devices are octal transparent1• Wide Operating Voltage Range f ..
SN74F299DWR ,Universal shift / storage registersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74F299N ,Universal shift / storage registersmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F299N ,Universal shift / storage registers The SN54F299 is obsolete and no ..
SN74F30 ,8-input positive-NAND gateslogic diagram (positive logic)1A2B3C4D8Y5E6F11G12HPin numbers shown are for the D, J, and N package ..
SN74F30 ,8-input positive-NAND gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F30D ,8-input positive-NAND gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
8500401EA-SN54HC4040J-SNJ54HC4040J
Asynchronous 12-Bit Binary Counters
SN74HC4040... D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
(TOP VIEW)NC − No internal connectionLE
GNDCCJ
CLR
CLKAI
CLRGQNC
CLKQ
GNDL K
description/ordering informationThe ’HC4040 devices are 12-stage asynchronous binary counters, with the outputs of all stages available
externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low.
The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay
circuits, counter controls, and frequency-dividing circuits.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
