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74VHCT245MOTN/a30avaiOctal Bidirectional Transceiver with TRI-STATE Outputs


74VHCT245 ,Octal Bidirectional Transceiver with TRI-STATE Outputs74VHC245 74VHCT245#OctalBidirectionalTransceiverwithTRI-STATEOutputsOctober199574VHC245 74VHCT245#O ..
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74VHCT245
Octal Bidirectional Transceiver with TRI-STATE Outputs
TL/F/11520
74VHC245
74VHCT245
Octal
Bidirectional
Transceiver
with
TRI-STATE
Outputs
October 1995
74VHC245# 74VHCT245
Octal Bidirectional Transceiver with TRI-STATEÉ Outputs
General Description
The VHC/VHCT245isan advancedhigh speed CMOSoctal
bus transceiverfabricated with silicon gate CMOS technolo-
gy.It achieves high speed operation similarto equivalent
Bipolar Schottky TTL while maintainingthe CMOSlow pow- dissipation. The ’VHC245is intendedfor bidirectional
asynchronouscommunicationbetween databusses.Thedi-
rectionof datatransmissionis determinedby thelevel ofthe
T/R input.The enable inputcanbe usedto disablethede-
viceso thatthe bussesare effectively isolated.All inputs
are equipped with protection circuits against static dis-
charge.
Features High Noise Immunity:
VHC VNIHe VNILe 28% VCC (Min)
VHCTVIHe 2.0V,VILe 0.8V Power Down Protection:
VHC Inputs Only
VHCT Inputsand Outputs Low Noise:
VHC VOLPe 0.9V (typ)
VHCT VOLPe 1.1V (typ) Low Power Dissipation:
ICCe4mA (Max)@Tae 25§C Balanced Propagation Delays: tpLHj tpHLPinand Function Compatible with 74HC/HCT245
Commercial Package PackageDescriptionNumber
74VHC245M M20B 20 LeadMoldedJEDEC SOIC
74VHC245SJ M20D 20 LeadMoldedEIAJ SOIC
74VHC245MSC MSC20 20 LeadMoldedEIAJ Type1 SSOP
74VHC245MTC MTC20 20 LeadMoldedJEDEC Type1 TSSOP
74VHC245N N20A 20 LeadMoldedDIP
74VHCT245M M20B 20 LeadMoldedJEDEC SOIC
74VHCT245SJ M20D 20 LeadMoldedEIAJ SOIC
74VHCT245MTC MTC20 20 LeadMoldedJEDEC Type1 TSSOP
74VHCT245N N20A 20 LeadMoldedDIP
Note: Surface mount packagesarealso availableon TapeandReel. Specifyby appendingthe suffixletter‘‘X’’to theorderingcode.
EIAJType 1SSOP availableonTapeandReelonly, order MSCX.
Logic Symbol Connection Diagram
IEEE/IEC
TL/F/11520–2
PinAssignmentfor DIP,
SSOP, TSSOPand SOIC
TL/F/11520–3
Pin Description
Pin DescriptionNames OutputEnableInput
T/R Transmit/ReceiveInput
A0–A7 SideA Inputsor
TRI-STATE Outputs
B0–B7 SideB Inputsor
TRI-STATE Outputs
Truth Table
Inputs Outputs T/R L BusBDatatoBusA H BusADatatoBusB X HIGH-ZStatee HIGH VoltageLevelXe Immateriale LOW Voltage Level
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M125/PrintedinU.S.A.
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