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74VHC05TTRSTMN/a17avaiHEX INVERTER (OPEN DRAIN)
74VHC05TTRST,STN/a2500avaiHEX INVERTER (OPEN DRAIN)


74VHC05TTR ,HEX INVERTER (OPEN DRAIN)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
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74VHC05TTR
HEX INVERTER (OPEN DRAIN)
1/8June 2001 HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:CC = 2 μA (MAX.) at TA =25°C HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 05 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (MAX.)
DESCRIPTION

The 74VHC05 is an advanced high-speed CMOS
OPEN DRAIN HEX INVERTER fabricated with
sub-micron silicon gate and double-layer metal
wiring C2 MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VHC05

HEX INVERTER (OPEN DRAIN)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74VHC05
2/8
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE

Z: High Impedance
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
RECOMMENDED OPERATING CONDITIONS

1) VIN from 30% to 70% of VCC
74VHC05
3/8
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS(Input tr = tf = 3ns)

(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
74VHC05
4/8
CAPACITIVE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/6 (per gate)
DYNAMIC SWITCHING CHARACTERISTICS

1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
74VHC05
5/8
TEST CIRCUIT

CL = 15/50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)

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