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74V2T32STRSTN/a2300avaiDUAL 2-INPUT OR GATE


74V2T32STR ,DUAL 2-INPUT OR GATE74V2T32DUAL 2-INPUT OR GATEPRELIMINARY DATA ■ HIGH SPEED: t = 4.6ns (TYP.) at V = 5VPD CC■ LOW POW ..
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74V2T32STR
DUAL 2-INPUT OR GATE
1/9December 2001 HIGH SPEED: tPD = 4.6ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:CC = 1μA(MAX.) at TA =25°C COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL OPERATING VOLTAGE RANGE:CC (OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY
DESCRIPTION

The 74V2T32 is an advanced high-speed CMOS
DUAL 2-INPUT OR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2 MOS tecnology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage.
This device can be used to interface 5V to 3V
systems and it is ideal for portable applications
like personal digital assistant and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
74V2T32

DUAL 2-INPUT OR GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PRELIMINARY DATA
74V2T32
2/9
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occour. Functional operation under these condition is
not implied
RECOMMENDED OPERATING CONDITIONS

1) VIN from 0.8V to 2V
74V2T32
3/9
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)

(*) Voltage range is 5.0V ± 0.5V
CAPACITANCE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivqlent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average current cqn be obtqined by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2
74V2T32
4/9
DYNAMIC SWITCHING CHARACTERISTICS

1) Number of output defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining outputs is
measured in the LOW state.
TEST CIRCUIT

CL = 15/50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAY (f=1MHz; 50% duty cycle)
74V2T32
5/9
74V2T32
6/9
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