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74LX1G02CTRSTN/a15002avaiLOW VOLTAGE SINGLE 2-INPUT NOR GATE
74LX1G02STRSTN/a53310avaiLOW VOLTAGE SINGLE 2-INPUT NOR GATE


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74LX1G02CTR-74LX1G02STR
LOW VOLTAGE SINGLE 2-INPUT NOR GATE
1/10October 2002 5V TOLERANT INPUTS HIGH SPEED:tPD= 4.2ns (MAX.)at VCC =3V LOW POWER DISSIPATION:
ICC =1μA(MAX.)atTA =25°C POWER DOWN PROTECTIONON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL= 24mA (MIN)at VCC =3V BALANCED PROPAGATION DELAYS:
tPLH≅ tPHL OPERATING VOLTAGE RANGE:
VCC(OPR)= 1.65Vto 5.5V
(1.2V Data Retention) IMPROVED LATCH-UP IMMUNITY
DESCRIPTION

The 74LX1G02isa low voltage CMOS SINGLE
2-INPUT NOR GATE fabricated with sub-micron
silicon gate and double-layer metal wiringC2 MOS
technology.
The internal circuitis composedof3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protectionis providedonall inputs
and0to7V canbe acceptedon inputs withno
regardtothe supply voltage. This device canbe
usedto interface5Vto3V.
All inputs and outputs are equipped with
protection circuits against static discharge.
74LX1G02

SINGLE 2-INPUT NOR GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LX1G02
2/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS

AbsoluteMaximum Ratingsare those values beyond which damagetothe devicemay occur. Functional operationunder these conditionsis
not impliedIO absolute maximum rating mustbe observedVO VCC
74LX1G02
3/10
RECOMMENDED OPERATING CONDITIONS Truth Table guaranteed:1.2Vto3.6VVINfrom0.8Vto2VatVCC =3.0V SPECIFICATIONS
74LX1G02
4/10 ELECTRICAL CHARACTERISTICS (Inputtr=tf =3ns)
CAPACITIVE CHARACTERISTICS
CPD isdefinedasthe valueoftheIC’s internal equivalent capacitance whichis calculatedfrom theoperating current consumption without
load. (RefertoTest Circuit). Average operating currentcanbe obtainedbythe following equation. ICC(opr) =CPD xVCCxfIN +ICC
74LX1G02
5/10
TEST CIRCUIT
=ZOUTof pulse generator (typically50Ω)
TEST CIRCUIT AND WAVEFORM SYMBOL VALUE
WAVEFORM: PROPAGATION DELAY
(f=1MHz; 50% duty cycle)

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