74LVX573MTC ,Low Voltage Octal Latch with 3-STATE Outputs74LVX573 Low Voltage Octal Latch with 3-STATE OutputsJune 1993Revised September 200374LVX573Low Vol ..
74LVX573MTCX ,Low Voltage Octal Latch with 3-STATE OutputsFunctional Description Truth TableThe LVX573 contains eight D-type latches. When theInputs Outputse ..
74LVX573MTCX ,Low Voltage Octal Latch with 3-STATE OutputsapplicationsEnable (OE) inputs. The LVX573 is functionally identical to
74LVX573MTC-74LVX573MTCX
Low Voltage Octal Latch with 3-STATE Outputs
74LVX573 Low Voltage Octal Latch with 3-STATE Outputs June 1993 Revised September 2003 74LVX573 Low Voltage Octal Latch with 3-STATE Outputs General Description Features The LVX573 is a high-speed octal latch with buffered com-Input voltage translation from 5V to 3V mon Latch Enable (LE) and buffered common OutputIdeal for low power/low noise 3.3V applications Enable (OE) inputs. The LVX573 is functionally identical to Guaranteed simultaneous switching noise level and the LVX373 but with inputs and outputs on opposite sides dynamic threshold performance of the package. The inputs tolerate up to 7V allowing inter- face of 5V systems to 3V systems. Ordering Code: Order Number Package Number Package Description 74LVX573M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LVX573SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX573MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description D –D Data Inputs 0 7 LE Latch Enable Input OE 3-STATE Output Enable Input O –O 3-STATE Latch Outputs 0 7 © 2003 DS011616
