74LVX240MSCX , Low Voltage Octal Buffer/Line Driver with 3-STATE Outputsapplicationsclock driver and bus oriented transmitter or receiver which Guaranteed simultaneous swi ..
74LVX240MTC ,Low Voltage Octal Buffer/Line Driver with 3-STATE OutputsFeaturesThe LVX240 is an octal inverting buffer and line driver
74LVX240MSCX
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
74LVX240 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs May 1993 Revised March 1999 74LVX240 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The LVX240 is an octal inverting buffer and line driver � Input voltage translation from 5V to 3V designed to be employed as a memory address driver, � Ideal for low power/low noise 3.3V applications clock driver and bus oriented transmitter or receiver which � Guaranteed simultaneous switching noise level and provides improved PC board density. The inputs tolerate dynamic threshold performance up to 7V allowing interface of 5V systems to 3V systems. Ordering Code: Order Number Package Number Package Description 74LVX240M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-130, 0.300” Wide 74LVX240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions IEEE/IEC Pin Names Description OE , OE 3-STATE Output Enable Inputs 1 2 I –I Inputs 0 7 O –O Outputs 0 7 Truth Tables Inputs Outputs (Pins 12, 14, 16, 18) OE I 1 n L L H Connection Diagram L H L H X Z Inputs Outputs (Pins 3, 5, 7, 9) OE I 2 n L L H L H L H X Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance © 1999 DS011609.prf
