74LVX08MTC ,Low Voltage Quad 2-Input AND GateElectrical CharacteristicsT
74LVX08MTC-74LVX08MTCX-74LVX08MX-74LVX08SJ-74LVX08SJX
Low Voltage Quad 2-Input AND Gate
74LVX08 Low Voltage Quad 2-Input AND Gate May 1993 Revised February 2005 74LVX08 Low Voltage Quad 2-Input AND Gate General Description Features The LVX08 contains four 2-input AND gates. The inputs tol-Input voltage level translation from 5V to 3V erate voltages up to 7V allowing the interface of 5V sys-Ideal for low power/low noise 3.3V applications tems to 3V systems. Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Package Order Number Package Description Number 74LVX08M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX08SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX08MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVX08MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm (Note 1) Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description A , B Inputs n n O Outputs n © 2005 DS011602
