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74LVTH16835MTDFAIRCHILN/a2avaiLow Voltage 18-Bit Universal Bus Driver with 3-STATE Outputs
74LVTH16835MTDXFAIN/a12avaiLow Voltage 18-Bit Universal Bus Driver with 3-STATE Outputs


74LVTH16835MTDX ,Low Voltage 18-Bit Universal Bus Driver with 3-STATE Outputs74LVTH16835 Low Voltage 18-Bit Universal Bus DriverMarch 2001Revised March 200174LVTH16835Low Volta ..
74LVTH16952 ,Low Voltage 16-Bit Registered Transceiver with 3-STATE OutputsFeaturesThe LVT16952 and LVTH16952 are 16-bit registered

74LVTH16835MTD-74LVTH16835MTDX
Low Voltage 18-Bit Universal Bus Driver with 3-STATE Outputs
74LVTH16835 Low Voltage 18-Bit Universal Bus Driver March 2001 Revised March 2001 74LVTH16835 Low Voltage 18-Bit Universal Bus Driver with Bushold and 3-STATE Outputs General Description Features The LVTH16835 is an 18-bit universal bus driver that com-Input and output interface capability to systems at bines D-type latches and D-type flip-flops to allow data flow 5V V CC in transparent, latched and clocked modes. Bushold data inputs eliminate the need for external Data flow is controlled by output-enable (OE), latch-enable pull-up resistors to hold unused inputs (LE), and clock (CLK) inputs. The device operates in Live insertion/extraction permitted Transparent Mode when LE is held HIGH. The device Power up/down high impedance provides glitch-free bus operates in clocked mode when LE is LOW and CLK is tog- loading gled. Data transfers from the Inputs (A ) to Outputs (Y ) on n n Outputs source/sink −32 mA/+64 mA a Positive Edge Transition of the Clock. When OE is LOW, ESD Performance: the output data is enabled. When OE is HIGH the output port is in a high impedance state. Human-Body Model > 2000V The LVTH16835 data inputs include bushold, eliminating Machine Model > 200V the need for external pull-up resistors to hold unused Charged-Device Model > 1000V inputs. The bus driver is designed for low voltage (3.3V) V appli- CC cations, but with the capability to provide a TTL interface to a 5V environment. The LVTH16835 is fabricated with an advanced BiCMOS technology to achieve high speed oper- ation similar to 5V ABT while maintaining low power dissi- pation. Ordering Code: Order Number Package Number Package Description 74LVTH16835MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide 74LVTH16835MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2001 DS500102
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