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74LVTH16543FAIRCHILDN/a4800avaiLow Voltage 16-Bit Registered Transceiver with 3-STATE Outputs


74LVTH16543 ,Low Voltage 16-Bit Registered Transceiver with 3-STATE OutputsFeaturesThe LVT16543 and LVTH16543 16-bit transceivers

74LVTH16543
Low Voltage 16-Bit Registered Transceiver with 3-STATE Outputs
74LVT16543 • 74LVTH16543 Low Voltage 16-Bit Registered Transceiver with 3-STATE Outputs January 2000 Revised October 2001 74LVT16543  74LVTH16543 Low Voltage 16-Bit Registered Transceiver with 3-STATE Outputs General Description Features The LVT16543 and LVTH16543 16-bit transceiversInput and output interface capability to systems at contain two sets of D-type latches for temporary storage of 5V V CC data flowing in either direction. Separate Latch Enable and Bushold data inputs eliminate the need for external Output Enable inputs are provided for each register to per- pull-up resistors to hold unused inputs (74LVTH16543) mit independent control of inputting and outputting in either Also available without bushold feature (74LVT16543) direction of data flow. Each byte has separate control Live insertion/extraction permitted inputs, which can be shorted together for full 16-bit opera- tion.Power Up/Down high impedance provides glitch-free bus loading The LVTH16543 data inputs include bushold, eliminating the need for external pull-up resistors to hold unusedOutputs source/sink −32 mA/+64 mA inputs.Functionally compatible with the 74 series 16543 These transceivers are designed for low-voltage (3.3V) Latch-up conforms to JEDEC JED78 V applications, but with the capability to provide a TTL CC ESD performance: interface to a 5V environment. The LVT16543 and Human-body model > 2000V LVTH16543 are fabricated with an advanced BiCMOS Machine model > 200V technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. Charged-device model > 1000V Ordering Code: Order Number Package Number Package Description 74LVT16543MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide (Preliminary) 74LVT16543MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Preliminary) 74LVTH16543MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 74LVTH16543MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol © 2001 DS012449
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