SN74LVTH16244ADL ,3.3-V ABT 16-Bit Buffers/Drivers With 3-State OutputsSN54LVTH16244A . . . WD PACKAGESN74LVTH16244A . . . DGG, DGV, OR DL PACKAGE(TOP VIEW)1 481OE 2OE2 4 ..
SN74LVTH16244ADLR ,3.3-V ABT 16-Bit Buffers/Drivers With 3-State OutputsSN54LVTH16244A, SN74LVTH16244A
SN74LVTH16245 , 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVTH16245 , 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVTH16245 , 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVTH16245A ,3.3-V ABT 16-Bit Bus Transceivers With 3-State OutputsSCBS143R–MAY 1992–REVISED NOVEMBER 2006(1)GRD OR ZRD PACKAGETERMINAL ASSIGNMENTS(TOP VIEW)(54-Ball ..
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74LVTH16244ADGGRE4-74LVTH16244ADGGRG4-SN74LVTH16244A-SN74LVTH16244ADGGR-SN74LVTH16244ADGVR-SN74LVTH16244ADL-SN74LVTH16244ADLR
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54LVTH16244A, SN74LVTH16244A
www.ti.com SCBS142U –MAY 1992–REVISED OCTOBER 2013
3.3-V ABT 16-Bit Buffers/Drivers With 3-State Outputs
Checkfor Samples: SN54LVTH16244A, SN74LVTH16244A
1FEATURES DESCRIPTIONThe 'LVTH16244A devices are 16-bit buffers and line
Membersof the Texas Instruments Widebus™ drivers designed for low-voltage (3.3-V) VCC
Family operation, but with the capabilityto providea TTL
• State-of-the-Art Advanced BiCMOS interfacetoa 5-V system environment. These devices
Technology (ABT) Design for 3.3-V canbe usedas four 4-bit buffers, two 8-bit buffers,or
Operation and Low Static-Power one 16-bit buffer. These devices provide true outputs
Dissipation and symmetrical active-low output-enable (OE)
inputs.
• Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With Active bus-hold circuitry holds unused or undriven
3.3-V VCC) inputsata valid logic state. Useof pullupor pulldown
resistors with the bus-hold circuitry is not
• Support Unregulated Battery Operation recommended.
Downto 2.7VWhen VCCis between0 and 1.5V, the devices arein
• Typical VOLP (Output Ground Bounce)the high-impedance state during power upor power
<0.8Vat VCC= 3.3V,TA= 25°C down. However,to ensure the high-impedance state
• Ioff and Power-Up 3-State Support Hot above 1.5 V, OE should be tiedto VCC througha
Insertion pullup resistor; the minimum valueof the resistoris
Bus Hold on Data Inputs Eliminates the Need determined by the current-sinking capability of the
for External Pullup/Pulldown Resistors driver.
Latch-Up Performance Exceeds 500 mA These devices are fully specified for hot-insertion
Per JESD17 applications using Ioff and power-up 3-state. The Ioff
circuitry disables the outputs, preventing damaging
• ESD Protection Exceeds JESD22current backflow through the devices when they are
– 2000-V Human-Body Model (A114-A) powered down. The power-up 3-state circuitry places
– 200-V Machine Model (A115-A) the outputsin the high-impedance state during power and power down, which prevents driver conflict.
