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74LVC1G57GMNXPN/a10000avaiLow-power configurable multiple function gate
74LVC1G57GWNXPN/a35000avaiLow-power configurable multiple function gate


74LVC1G57GW ,Low-power configurable multiple function gateFeatures and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output fo ..
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74LVC1G57GM-74LVC1G57GW
Low-power configurable multiple function gate
1. General description
The 74LVC1G57 provides configurable multiple functions. The output state is determined
by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,
NOR, XNOR, inverter and buffer. All inputs can be connected to VCC or GND.
Inputs can be driven from either 3.3 Vor5 V devices. This feature allows the use of this
device in a mixed 3.3 V and5 V environment.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
All inputs (A, B and C) are Schmitt trigger inputs. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
2. Features and benefits
Wide supply voltage range from 1.65 Vto 5.5V5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95V) JESD8-5 (2.3 Vto 2.7V) JESD8B/JESD36 (2.7 Vto 3.6 V). ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V 24 mA output drive (VCC =3.0V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5V Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C.
74L VC1G57
Low-power configurable multiple function gate
Rev. 6 — 6 December 2011 Product data sheet
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate
3. Ordering information

4. Marking

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram

Table 1. Ordering information

74LVC1G57GW 40 Cto+125C SC-88 plastic surface-mounted package; 6 leads SOT363
74LVC1G57GV 40 Cto+125C SC-74 plastic surface-mounted package; 6 leads SOT457
74LVC1G57GM 40 Cto+125C XSON6 plastic extremely thin small outline package; leads; 6 terminals; body 1 1.45 0.5 mm
SOT886
74LVC1G57GF 40 Cto+125C XSON6 plastic extremely thin small outline package; leads; 6 terminals; body 11 0.5 mm
SOT891
74LVC1G57GN 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 0.9 1.0 0.35 mm
SOT1115
74LVC1G57GS 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 1.0 1.0 0.35 mm
SOT1202
Table 2. Marking

74LVC1G57GW YC
74LVC1G57GV V57
74LVC1G57GM YC
74LVC1G57GF YC
74LVC1G57GN YC
74LVC1G57GS YC
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate
6. Pinning information
6.1 Pinning

6.2 Pin description

7. Functional description

[1] H= HIGH voltage level; L= LOW voltage level.
Table 3. Pin description
1 data input
GND 2 ground (0V) 3 data input 4 data output
VCC 5 supply voltage 6 data input
Table 4. Function table[1]
LH H L LH H L L L HL L H HH
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate
7.1 Logic configurations

Table 5. Function selection table

2-input AND see Figure5
2-input AND with both inputs inverted see Figure8
2-input NAND with inverted input see Figure 6 and Figure7
2-input OR with inverted input see Figure 6 and Figure7
2-input NOR see Figure8
2-input NOR with both inputs inverted see Figure5
2-input XNOR see Figure9
Inverter see Figure10
Buffer see Figure11
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate

8. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC=0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For SC-88 and SC-74 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions

Table 6. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI <0V 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO >VCC or VO <0V - 50 mA output voltage Active mode [1][2] 0.5 +6.5 V
Power-down mode [1][2] 0.5 +6.5 V output current VO =0VtoVCC - 50 mA
ICC supply current - +100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40 Cto+125C [3] -250 mW
Table 7. Recommended operating conditions

VCC supply voltage 1.65 - 5.5 V input voltage 0 - 5.5 V output voltage Active mode 0 - VCC V
VCC=0 V; Power-down mode 0 - 5.5 V
Tamb ambient temperature 40 - +125 C
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate
10. Static characteristics

[1] Typical values are measured at maximum VCC and Tamb= 25 C.
Table 8. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
VOL LOW-level
output voltage =VT+or VT =100 A;
VCC =1.65Vto5.5 V - 0.1 - 0.1 V =4mA; VCC = 1.65 V - - 0.45 - 0.7 V =8mA; VCC = 2.3 V - - 0.3 - 0.45 V =12mA; VCC = 2.7 V - - 0.4 - 0.6 V =24mA; VCC = 3.0 V - - 0.55 - 0.8 V =32mA; VCC = 4.5 V - - 0.55 - 0.8 V
VOH HIGH-level
output voltage =VT+or VT= 100 A;
VCC =1.65Vto5.5 V
VCC 0.1 - - VCC 0.1 - V= 4mA; VCC = 1.65 V 1.2 - - 0.95 - V= 8mA; VCC = 2.3 V 1.9 - - 1.7 - V= 12 mA; VCC = 2.7 V 2.2 - - 1.9 - V= 24 mA; VCC = 3.0 V 2.3 - - 2.0 - V= 32 mA; VCC = 4.5 V 3.8 - - 3.4 - V input leakage
current
VI = 5.5 V or GND;
VCC =0Vto5.5V 0.1 5- 100 A
IOFF power-off
leakage
currentorVO =5.5 V; VCC = 0 V - 0.1 10 - 200 A
ICC supply current VI = 5.5 V or GND; IO = 0 A;
VCC= 1.65Vto 5.5 V 0.1 10 - 200 A
ICC additional
supply current =VCC 0.6 V; IO =0A;
VCC= 2.3V to 5.5 V 500 - 5000 A input
capacitance
-2.5 - - - pF
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate
11. Dynamic characteristics

[1] Typical values are measured at nominal VCC and at Tamb= 25 C.
[2] tpd is the same as tPLH and tPHL
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD  VCC 2  fi  N + (CL  VCC 2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL  VCC 2  fo) = sum of outputs.
12. Waveforms

Table 9. Dynamic characteristics

Voltages are referenced to GND (ground=0 V); for test circuit see Figure 13.
tpd propagation delay A, B, Cto Y; see Figure12 [2]
VCC = 1.65 Vto 1.95 V 1.0 6.0 14.4 1.0 18 ns
VCC = 2.3 V to 2.7 V 0.5 3.5 8.3 0.5 10.4 ns
VCC = 2.7 V 0.5 4.2 8.5 0.5 10.6 ns
VCC = 3.0 Vto 3.6 V 0.5 3.8 6.3 0.5 7.9 ns
VCC = 4.5 Vto 5.5 V 0.5 3.0 5.1 0.5 6.4 ns
CPD power dissipation
capacitance
VCC =3.3 V; VI =GNDto VCC [3] -22- - - pF
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate

Table 10. Measurement points

1.65Vto 1.95V 0.5VCC VCC 0.5VCC
2.3Vto 2.7V 0.5VCC VCC 0.5VCC
2.7V 1.5V 2.7V 1.5V
3.0Vto 3.6V 1.5V 2.7V 1.5V
4.5Vto 5.5V 0.5VCC VCC 0.5VCC
Table 11. Measurement points

1.65 V to 1.95V VCC  2.0ns 30pF 1k open
2.3Vto 2.7V VCC  2.0ns 30pF 500 open
2.7V 2.7V  2.5ns 50pF 500 open
3.0Vto 3.6V 2.7V  2.5ns 50pF 500 open
4.5Vto 5.5V VCC  2.5ns 50pF 500 open
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate
13. Transfer characteristics

[1] Typical values are measured at Tamb =25C.
14. Waveforms transfer characteristics

Table 12. Transfer characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
VT+ positive-going
threshold voltage
see Figure 14, Figure 15,
Figure 16 and Figure17
VCC = 1.8 V 0.70 1.02 1.20 0.67 1.20 V
VCC = 2.3 V 1.11 1.42 1.60 1.08 1.60 V
VCC = 3.0 V 1.50 1.79 2.00 1.47 2.00 V
VCC = 4.5 V 2.16 2.52 2.74 2.13 2.74 V
VCC = 5.5 V 2.61 2.99 3.33 2.58 3.33 V
VT negative-going
threshold voltage
see Figure 14, Figure 15,
Figure 16 and Figure17
VCC = 1.8 V 0.30 0.53 0.72 0.30 0.75 V
VCC = 2.3 V 0.58 0.77 1.00 0.58 1.03 V
VCC = 3.0 V 0.80 1.04 1.30 0.80 1.33 V
VCC = 4.5 V 1.21 1.55 1.90 1.21 1.93 V
VCC = 5.5 V 1.45 1.86 2.29 1.45 2.32 V hysteresis voltage (VT+ VT);
see Figure 14, Figure 15,
Figure 16 and Figure17
VCC = 1.8 V 0.30 0.48 0.62 0.23 0.62 V
VCC = 2.3 V 0.40 0.64 0.80 0.34 0.80 V
VCC = 3.0 V 0.50 0.75 1.00 0.44 1.00 V
VCC = 4.5 V 0.71 0.97 1.20 0.65 1.20 V
VCC = 5.5 V 0.71 1.13 1.40 0.65 1.40 V
NXP Semiconductors 74LVC1G57
Low-power configurable multiple function gate

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