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74LVC161284-74LVC161284TTR Fast Delivery,Good Price
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74LVC161284TIN/a5275avaiLOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER
74LVC161284TTRSTMN/a24avaiLOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER


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74LVC161284-74LVC161284TTR
LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER
1/11May 2003 HIGH SPEED:tPD= 9ns (MAX.)atVCC =3V LOW POWER DISSIPATION:
ICC=20μA(MAX)at VCC=3.6V TA=85°C TTL COMPATIBLE INPUTSIH =2V (MIN)VIL =0.8(MAX) OPERATING VOLTAGE RANGE:
VCC(OPR)= 3.0Vto 3.6V A PORT HAVE STANDARD 4mA TOTEM
POLE OUTPUT B PORT HIGH DRIVE SOURCE/SINK
CAPABILITY OF 14mA SUPPORT IEEE STD 1284-I (LEVEL1 TYPE)
AND IEEE STD 1284-II (LEVEL2 TYPE) FOR
BIDIRECTIONAL PARALLEL
COMMUNICATIONS BETWEEN PERSONAL
COMPUTER ANT PRINTING PERIPHERALS TRANSLATION CAPABILITY ALLOW
OUTPUTSON CABLESIDETO INTERFACE
WITH 5V SIGNAL PULL-UP RESISTOR INTEGRATED ON ALL
OPEN-DRAIN OUTPUT ELIMINATE THE
NEED FOR DISCRETE RESISTOR REPLACE THE FUNCTION OF TWO
74LVC1284 DEVICES
DESCRIPTION

The 74LVC161284 contains eight high speed non
inverting bidirectional buffers and eleven control/
status non-inverting buffers with open drain
outputs fabricated in silicon gate C2 MOS
technology. It’s intendedto providea standard
signaling method for a bi-direction parallel
peripheralinan Extended Capabilities Port Mode
(ECP). The HD (Active HIGH) input pin enables
the Cable portto switch from Open Draintoa high
drive totem pole output, capableof sourcing 14mAall thirteen buffer and 84mA on PERI LOGIC
OUTPUT buffer. The DIR input determines the
directionof data flow on the bidirectional buffers.
DIR (Active HIGH) enables data flow fromA portB port. DIR (Active LOW) enables data flow
fromB port toA port.Itis availablein the
commercial temperature range.
74LVC161284

LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER
ORDER CODES
PIN CONNECTION
74LVC161284
2/11
LOGIC DIAGRAM

NOTEA: The PMOS transistors prevent backdriving current fromthe signal pinsto VCC/CABLE when VCC/CABLEis openorat GND. The
PMOS transistoris turnedoff whenthe associated driverisinthelow state.
NOTEB: The PMOS transistor prevents backdriving current fromthe signal pinsto VCC/CABLE when VCC/CABLEis openorat GND.
PIN DESCRIPTION
74LVC161284
3/11
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS

AbsoluteMaximum Ratingare those value beyond whichdamagetothe devicemay occur. Functional operation under theseconditionisnot
implied
RECOMMENDED OPERATING CONDITIONS
74LVC161284
4/11 SPECIFICATIONS
74LVC161284
5/11 ELECTRICAL CHARACTERISTICS Skewis definedasthe absolute valueofthe difference betweenthe actual propagation delayfor anytwo outputsofthe same device
switchinginthe same direction, either HIGHor LOW (tOSLH=| tPLHm -tPLHn|, tOSHL =|tPHLm -tPHLn| Parameter guaranteedby design
CAPACITANCE CHARACTERISTICS
74LVC161284
6/11
TEST CIRCUIT
=50pFor equivalent (includesjig and probe capacitance) =R1= 500Ω or equivalent =ZOUTof pulse generator (typically 50Ω)
WAVEFORM1: PROPAGATION DELAY INPUT An TO OUTPUT
(f=1MHz; 50% duty cycle)
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