IC Phoenix
 
Home ›  7722 > 74LVC125ABQ-74LVC125AD-74LVC125ADB-74LVC125APW,Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
74LVC125ABQ-74LVC125AD-74LVC125ADB-74LVC125APW Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
74LVC125ABQNXP/PHILIPSN/a24000avai74LVC125A; Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
74LVC125ADN/a783avaiQuad buffer/line driver with 5-volt tolerant inputs/outputs 3-State
74LVC125ADBNXPN/a47avaiQuad buffer/line driver with 5-volt tolerant inputs/outputs 3-State
74LVC125APWTI N/a35688avaiQuad buffer/line driver with 5 V tolerant input/outputs; 3-state


74LVC125APW ,Quad buffer/line driver with 5 V tolerant input/outputs; 3-stateLogic diagram74LVC125A All information provided in this document is subject to legal disclaimers. ..
74LVC125ATTR ,LOW VOLTAGE CMOS QUAD BUS BUFFERS HIGH PERFORMANCE74LVC125ALOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)HIGH PERFORMANCE■ 5V TOLERANT INPUTS■ HIGH SPEE ..
74LVC125ATTR ,LOW VOLTAGE CMOS QUAD BUS BUFFERS HIGH PERFORMANCEABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Supply Voltage-0.5 to +7.0 VCCV DC Input Volta ..
74LVC125D ,Quad buffer/line driver; 3-State
74LVC125PW ,Quad buffer/line driver; 3-State
74LVC125PW ,Quad buffer/line driver; 3-State
8035AHL , HMOS SINGLE-COMPONENT 8-BIT MICROCONTROLLER
8041-05-011 , DIP Reed Relays
8049AH , HMOS SINGLE-COMPONENT 8-BIT MICROCONTROLLER
8080A , 8-Bit Microprocessor
8085AH-2 , 8-Bit HMOS MICROPROCESSORS 3MHz, 5 MHz and 6 MHz Selections Avallable
80C186 , CMOS High-Integration 16-Bit Microprocessors


74LVC125ABQ-74LVC125AD-74LVC125ADB-74LVC125APW
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
1. General description
The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs
(nY) that are controlled by the output enable input (nOE). A HIGH at nOE causes the
outputs to assume a high-impedance OFF-state.
Inputs can be driven from either 3.3 Vor5 V devices. When disabled, up to 5.5 V can be
applied to the outputs.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2Vto 3.6V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65Vto 1.95V) JESD8-5A (2.3Vto 2.7V) JESD8-C/JESD36 (2.7Vto 3.6V) ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-B exceeds 200V CDM JESD22-C101E exceeds 1000V Multiple package options Specified from 40 C to +85C and 40 C to +125C
74L VC125A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
Rev. 7 — 11 April 2013 Product data sheet
NXP Semiconductors 74L VC125A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
3. Ordering information

4. Functional diagram

Table 1. Ordering information

74LVC125AD 40 C to +125 C SO14 plastic small outline package; 14 leads; body width
3.9 mm; body thickness 1.47 mm
SOT108-1
74LVC125ADB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LVC125APW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LVC125ABQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 14 terminals;
body 2.53 0.85 mm
SOT762-1
NXP Semiconductors 74L VC125A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
5. Pinning information
5.1 Pinning

5.2 Pin description

6. Functional description

[1] H= HIGH voltage level; L= LOW voltage level; X= don’t care; Z = high-impedance OFF-state
Table 2. Pin description

1OE, 2OE, 3OE, 4OE 1, 4, 10, 13 data enable input (active LOW)
1A, 2A, 3A, 4A 2, 5, 9, 12 data input , 2Y, 3Y, 4Y 3, 6, 8, 11 data output
GND 7 ground (0V)
VCC 14 supply voltage
Table 3. Function selection[1]
NXP Semiconductors 74L VC125A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
7. Limiting values

[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO14 packages: above 70 C derate linearly with 8 mW/K.
For (T)SSOP14 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 C derate linearly with 4.5 mW/K.
8. Recommended operating conditions

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - 50 mA output voltage output HIGH or LOW-state [2] 0.5 VCC + 0.5 V
output 3-state [2] 0.5 +6.5 V output current VO = 0 V to VCC - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Ptot total power dissipation Tamb = 40 C to +125C [3] -500 mW
Tstg storage temperature 65 +150 C
Table 5. Recommended operating conditions

VCC supply voltage 1.65 - 3.6 V
functional 1.2 - - V input voltage 0 - 5.5 V output voltage output HIGH or LOW state 0 - VCC V
output 3-state 0 - 5.5 V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and
fall rate
VCC = 2.3 V to 2.7 V 0 - 20 ns/V
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
NXP Semiconductors 74L VC125A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
9. Static characteristics

[1] All typical values are measured at VCC=3.3 V (unless stated otherwise) and Tamb =25C.
Table 6. Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level
input voltage
VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65  VCC - - 0.65  VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level input
voltage
VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35  VCC - 0.35  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output voltage =VIHorVIL= 100 A;
VCC =1.65Vto3.6V
VCC 0.2 - - VCC 0.3 - V= 4mA; VCC = 1.65 V 1.2 - - 1.05 - V= 8mA; VCC = 2.3V 1.8 - - 1.65 - V= 12 mA; VCC = 2.7 V 2.2 - - 2.05 - V= 18 mA; VCC = 3.0 V 2.4 - - 2.25 - V= 24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output voltage =VIHorVIL= 100 A;
VCC= 1.65Vto 3.6 V 0.2 - 0.3 V =4mA; VCC = 1.65 V - - 0.45 - 0.65 V =8mA; VCC = 2.3V - - 0.6 - 0.8 V =12mA; VCC = 2.7 V - - 0.4 - 0.6 V =24mA; VCC = 3.0 V - - 0.55 - 0.8 V input leakage
current
VCC = 3.6 V; VI =5.5V orGND - 0.1 5- 20 A
IOZ OFF-state
output current =VIHor VIL; VCC =3.6V; =5.5V orGND 0.1 5- 20 A
IOFF power-off
leakage current
VCC = 0.0 V; VIorVO =5.5V - 0.1 10 - 20 A
ICC supply current VCC = 3.6 V; VI =VCCor GND; =0A
-0.1 10 - 40 A
ICC additional
supply current
per input pin; VI =VCC 0.6V; =0A; VCC= 2.7 V to 3.6 V 5 500 - 5000 A input
capacitance
VCC= 0 V to 3.6V; =GNDto VCC
-4.0 - - - pF
NXP Semiconductors 74L VC125A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
10. Dynamic characteristics

[1] Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where: = input frequency in MHz; fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in Volts= number of inputs switching
(CL VCC2fo)= sum of the outputs.
Table 7. Dynamic characteristics

Voltages are referenced to GND (ground=0 V). For test circuit see Figure8.
tpd propagation delay nAto nY; see Figure6 [2]
VCC =1.2V - 12.0 - - - ns
VCC = 1.65 V to 1.95 V 1.5 5.4 11.0 1.5 12.8 ns
VCC = 2.3 V to 2.7V 1.0 2.9 5.7 1.0 6.7 ns
VCC = 2.7 V 1.5 2.8 5.5 1.5 7.0 ns
VCC = 3.0 V to 3.6 V 1.0 2.5 4.8 1.0 6.0 ns
ten enable time nOEto nY; see Figure7 [2]
VCC= 1.2V - 16.0 - - - ns
VCC = 1.65 V to 1.95 V 1.0 5.0 12.2 1.0 14.2 ns
VCC = 2.3 V to 2.7V 0.5 2.9 6.8 0.5 7.9 ns
VCC = 2.7 V 1.5 3.1 6.6 1.5 8.5 ns
VCC = 3.0 V to 3.6 V 1.0 2.3 5.4 1.0 7.0 ns
tdis disable time nOEto nY; see Figure7 [2]
VCC= 1.2V - 7.0 - - - ns
VCC = 1.65 V to 1.95 V 2.2 4.6 7.5 2.2 8.7 ns
VCC = 2.3 V to 2.7V 0.5 2.6 4.2 0.5 5.0 ns
VCC = 2.7 V 1.5 3.1 5.0 1.5 6.5 ns
VCC = 3.0 V to 3.6 V 1.0 3.2 4.6 1.0 6.0 ns
tsk(o) output skew time VCC= 3.0 V to 3.6V [3] - - 1.0 - 1.5 ns
CPD power dissipation
capacitance
per buffer; VI =GNDto VCC [4]
VCC = 1.65 V to 1.95 V - 6.0 - - - pF
VCC = 2.3 V to 2.7 V - 9.4 - - - pF
VCC = 3.0 V to 3.6 V - 12.4 - - - pF
NXP Semiconductors 74L VC125A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
11. AC waveforms

Table 8. Measurement points

1.2V VCC 0.5  VCC 0.5  VCC
1.65Vto 1.95V VCC 0.5  VCC 0.5  VCC
2.3Vto 2.7V VCC 0.5  VCC 0.5  VCC
2.7V 2.7 V 1.5 V 1.5 V
3.0 V to 3.6V 2.7 V 1.5 V 1.5 V
NXP Semiconductors 74L VC125A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state

Table 9. Test data

1.2V VCC  2 ns 30pF 1 k open 2  VCC GND
1.65Vto 1.95V VCC  2 ns 30pF 1 k open 2  VCC GND
2.3Vto 2.7V VCC  2 ns 30pF 500 open 2  VCC GND
2.7V 2.7V  2.5ns 50pF 500 open 2  VCC GND
3.0Vto 3.6V 2.7V  2.5ns 50pF 500 open 2  VCC GND
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED