74LV541PW Fast Delivery |IC PHOENIX CO.,LIMITED

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74LV541PW
Octal buffer/line driver; 3-state
General descriptionThe 74LV541 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC541 and 74HCT541.
The 74LV541 has octal non-inverting buffer/line drivers with 3-state outputs. The 3-state
outputs are controlledby the output enable inputs OE1 and OE2.A HIGHon OEn causes
the outputs to assume a high-impedance OFF-state. Features Optimized for low voltage applications: 1.0 V to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25°C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb =25°C ESD protection: HBM JESD22-A114E exceeds 2000V MM JESD22-A115-A exceeds 200V Non-inverting outputs Multiple package options Speciﬁed from −40 °Cto+85 °C and from −40°Cto +125°C Ordering information
74L V541
Octal buffer/line driver; 3-state
Rev. 03 — 14 April 2009 Product data sheet
Table 1. Ordering information
74LV541N −40°Cto +125°C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74LV541D −40°Cto +125°C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74LV541DB −40°Cto +125°C SSOP20 plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
74LV541PW −40°Cto +125°C TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
NXP Semiconductors 74L V541
Octal buffer/line driver; 3-state Functional diagram Pinning information
5.1 Pinning
NXP Semiconductors 74L V541
Octal buffer/line driver; 3-state
5.2 Pin description Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP20 packages: above 70 °C the value of Ptot derates linearly with 12 mW/K.
For SO20 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K.
For (T)SSOP20 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
Table 2. Pin description
OE1 1 output enable input (active LOW)
A0 to A7 2, 3, 4, 5, 6, 7, 8, 9 data input
GND 10 ground (0V)
Y0 to Y7 18, 17, 16, 15, 14, 13, 12,11 data output
OE2 19 output enable input (active LOW)
VCC 20 supply voltage
Table 3. Functional table[1] L L H H X Z X Z
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
VCC supply voltage −0.5 +4.6 V
IIK input clamping current VI < −0.5 V orVI >VCC+ 0.5V [1] -20 mA
IOK output clamping current VO< −0.5 V orVO >VCC+ 0.5V [1] -50 mA output current VO = −0.5 V to (VCC+ 0.5V) - 35 mA
ICC supply current - 70 mA
IGND ground current −70 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb= −40°Cto +125°C [2]
DIP20 - 750 mW
SO20, SSOP20, TSSOP20 - 500 mW
NXP Semiconductors 74L V541
Octal buffer/line driver; 3-state Recommended operating conditions
[1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 3.6 V, but LV devices are guaranteed to function down to
VCC=1.0 V (with input levels GND or VCC). Static characteristics
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage[1] 1.0 3.3 3.6 V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V
VCC = 2.0 V to 2.7 V - - 200 ns/V
VCC = 2.7 V to 3.6 V - - 100 ns/V
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - 0.9 - V
VCC = 2.0 V 1.4 - - 1.4 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level input voltage VCC = 1.2 V - - 0.3 - 0.3 V
VCC = 2.0 V - - 0.6 - 0.6 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level output voltage VI = VIH or VIL
IO = −100 μA; VCC = 1.2V - 1.2 - - - V
IO = −100 μA; VCC = 2.0V 1.8 2.0 - 1.8 - V
IO = −100 μA; VCC = 2.7V 2.5 2.7 - 2.5 - V
IO = −100 μA; VCC = 3.0V 2.8 3.0 - 2.8 - V
IO = −8 mA; VCC = 3.0V 2.4 2.82 - 2.2 - V
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 μA; VCC = 1.2V - 0 - - - V
IO = 100 μA; VCC = 2.0V - 0 0.2 - 0.2 V
IO = 100 μA; VCC = 2.7V - 0 0.2 - 0.2 V
IO = 100 μA; VCC = 3.0V - 0 0.2 - 0.2 V
IO = 8 mA; VCC = 3.0V - 0.2 0.40 - 0.50 V input leakage current VI =VCCor GND;
VCC= 3.6V - 1.0 - 1.0 μA
IOZ OFF-state output current VI =VIH or VIL; =VCCor GND;
VCC= 3.6V
--5 - 10 μA
NXP Semiconductors 74L V541
Octal buffer/line driver; 3-state
[1] Typical values are measured at Tamb = 25°C.
10. Dynamic characteristics
ICC supply current VI = VCC or GND; IO = 0A;
VCC= 3.6V - 20 - 160 μA
ΔICC additional supply current per input; VI = VCC − 0.6V;
VCC= 2.7Vto 3.6V - 500 - 850 μA input capacitance - 3.5 - - - pF
Table 6. Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground=0 V). For test circuit see Figure7.
tpd propagation delay Anto Yn; see Figure5 [2]
VCC = 1.2 V - 60 - - - ns
VCC = 2.0 V - 20 39 - 46 ns
VCC = 2.7 V - 15 29 - 34 ns
VCC = 3.0 V to 3.6 V; CL =15pF [3] -10 - - - ns
VCC = 3.0 V to 3.6 V [3] - 11 23 - 27 ns
ten enable time OEnto Yn; see Figure6 [2]
VCC = 1.2 V - 100 - - - ns
VCC = 2.0 V - 34 65 - 77 ns
VCC = 2.7 V - 25 48 - 56 ns
VCC = 3.0 V to 3.6 V [3] - 19 38 - 45 ns
tdis disable time OEnto Yn; see Figure6 [2]
VCC = 1.2 V - 100 - - - ns
VCC = 2.0 V - 36 66 - 78 ns
VCC = 2.7 V - 27 48 - 58 ns
VCC = 3.0 V to 3.6 V [3] - 21 39 - 47 ns
NXP Semiconductors 74L V541
Octal buffer/line driver; 3-state
[1] All typical values are measured at Tamb =25°C.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3V).
[4] CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2×fo) where: = input frequency in MHz, fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in Volts= number of inputs switching
Σ(CL× VCC2×fo)= sum of the outputs.
11. Waveforms
CPD power dissipation
capacitance=50 pF; fi = 1 MHz;= GNDto VCC
[4] -37 - - - pF
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V). For test circuit see Figure7.
NXP Semiconductors 74L V541
Octal buffer/line driver; 3-state
Table 8. Measurement points
< 2.7 V 0.5VCC 0.5VCC VOL + 0.1VCC VOH − 0.1VCC
2.7 V to 3.6V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V
NXP Semiconductors 74L V541
Octal buffer/line driver; 3-state
Table 9. Test data
< 2.7 V VCC ≤ 2.5 ns 50 pF 1kΩ open GND 2VCC
2.7 V to 3.6V 2.7 V ≤ 2.5 ns 15 pF , 50 pF 1kΩ open GND 2VCC

Partno	Mfg	Dc	Qty	Available	Descript
74LV541PW		N/a	37500	avai	Octal buffer/line driver; 3-state
74LV541PW	NXP	N/a	50	avai	Octal buffer/line driver; 3-state