74LV139PW Fast Delivery |IC PHOENIX CO.,LIMITED

74LV139PW ,Dual 2-to-4 line decoder/demultiplexerGeneral descriptionThe 74LV139 is a low-voltage Si-gate CMOS device that is pin and function compat ..
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74LV139PW
Dual 2-to-4 line decoder/demultiplexer
General descriptionThe 74LV139 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC139 and 74HCT139.
The 74LV139 is a dual 2-to-4 line decoder/demultiplexer. It has two independent
decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four
mutually exclusive outputs (nY0to nY3) that are LOW when selected. Each decoder has
an active LOW input (nE). When nE is HIGH, every output is forced HIGH. The enable
input can be used as the data input for a 1-to-4 demultiplexer application. Features Wide operating voltage: 1.0 V to 5.5 V Optimized for low voltage applications: 1.0 V to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25°C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb =25°C Demultiplexing capability Two independent 2-to-4 line decoders Multifunction capability Active LOW mutually exclusive outputs ESD protection: HBM JESD22-A114E exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Speciﬁed from −40 °Cto+85 °C and from −40°Cto +125°C Ordering information
74L V139
Dual 2-to-4 line decoder/demultiplexer
Rev. 04 — 13 December 2007 Product data sheet
Table 1. Ordering information
74LV139N −40°Cto +125°C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74LV139D −40°Cto +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
NXP Semiconductors 74L V139
Dual 2-to-4 line decoder/demultiplexer Functional diagram
74LV139DB −40°Cto +125°C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74LV139PW −40°Cto +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74LV139BQ −40°Cto +125°C DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad ﬂat package; no leads; 16 terminals;
body 2.5× 3.5 × 0.85 mm
SOT763-1
Table 1. Ordering information …continued
NXP Semiconductors 74L V139
Dual 2-to-4 line decoder/demultiplexer Pinning information
5.1 Pinning
5.2 Pin description
Table 2. Pin description 1 enable input (active LOW)
1A0 2 address input
1A1 3 address input
1Y0 4 output
1Y1 5 output
1Y2 6 output
1Y3 7 output
GND 8 ground (0V)
2Y3 9 output
2Y2 10 output
2Y1 11 output
2Y0 12 output
2A0 14 address input
2A1 13 address input 15 enable input (active LOW)
VCC 16 supply voltage
NXP Semiconductors 74L V139
Dual 2-to-4 line decoder/demultiplexer Functional description Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 12 mW/K above 70°C.
[3] Ptot derates linearly with 8 mW/K above 70°C.
[4] Ptot derates linearly with 5.5 mW/K above 60°C.
[5] Ptot derates linearly with 4.5 mW/K above 60°C.
Table 3. Function table= HIGH voltage level; L= LOW voltage level; X= don’t care X H HHH
LLLLH H H LH LH H
LLH H H LH H HHHHL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
VCC supply voltage −0.5 +7.0 V
IIK input clamping current VI < −0.5 V orVI >VCC+ 0.5V [1]- ±20 mA
IOK output clamping current VO< −0.5 V orVO >VCC+ 0.5V [1]- ±50 mA output current VO = −0.5 V to (VCC+ 0.5V) - ±25 mA
ICC supply current - 50 mA
IGND ground current −50 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125°C
DIP16 package [2]- 750 mW
SO16 package [3]- 500 mW
(T)SSOP16 package [4]- 500 mW
DHVQFN16 package [5]- 500 mW
NXP Semiconductors 74L V139
Dual 2-to-4 line decoder/demultiplexer Recommended operating conditions
[1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to
VCC=1.0 V (with input levels GND or VCC). Static characteristics
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage [1] 1.0 3.3 5.5 V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V
VCC = 2.0 V to 2.7 V - - 200 ns/V
VCC = 2.7 V to 3.6 V - - 100 ns/V
VCC = 3.6 V to 5.5 V - - 50 ns/V
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - 0.9 - V
VCC = 2.0 V 1.4 - - 1.4 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC -V
VIL LOW-level input voltage VCC = 1.2 V - - 0.3 - 0.3 V
VCC = 2.0 V - - 0.6 - 0.6 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3VCC - 0.3VCCV
VOH HIGH-level output voltage VI = VIH or VIL
IO = −100 μA; VCC = 1.2V - 1.2 - - - V
IO = −100 μA; VCC = 2.0V 1.8 2.0 - 1.8 - V
IO = −100 μA; VCC = 2.7V 2.5 2.7 - 2.5 - V
IO = −100 μA; VCC = 3.0V 2.8 3.0 - 2.8 - V
IO = −100 μA; VCC = 4.5V 4.3 4.5 - 4.3 - V
IO = −6 mA; VCC = 3.0V 2.4 2.82 - 2.2 - V
IO = −12 mA; VCC = 4.5V 3.6 4.2 - 3.5 - V
NXP Semiconductors 74L V139
Dual 2-to-4 line decoder/demultiplexer
[1] Typical values are measured at Tamb = 25°C.
10. Dynamic characteristics
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 μA; VCC = 1.2V - 0 - - - V
IO = 100 μA; VCC = 2.0V - 0 0.2 - 0.2 V
IO = 100 μA; VCC = 2.7V - 0 0.2 - 0.2 V
IO = 100 μA; VCC = 3.0V - 0 0.2 - 0.2 V
IO = 100 μA; VCC = 4.5V - 0 0.2 - 0.2 V
IO = 6 mA; VCC = 3.0V - 0.25 0.40 - 0.50 V
IO = 12 mA; VCC = 4.5V - 0.35 0.55 - 0.65 V input leakage current VI =VCCor GND;
VCC= 5.5V - 1.0 - 1.0 μA
ICC supply current VI = VCC or GND; IO = 0A;
VCC= 5.5V - 20.0 - 160 μA
ΔICC additional supply current per input; VI = VCC − 0.6V;
VCC= 2.7Vto 3.6V - 500 - 850 μA input capacitance - 3.5 - - - pF
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure8.
tpd propagation delay nAnto nYn; see Figure6 [2]
VCC = 1.2 V - 70 - - - ns
VCC = 2.0 V - 24 31 - 39 ns
VCC = 2.7 V - 18 23 - 29 ns
VCC = 3.0 V to 3.6 V; CL =15pF [3] -11 - - - ns
VCC = 3.0 V to 3.6 V [3] - 13 18 - 23 ns
VCC = 4.5 V to 5.5 V - - 15 - 19 ns
nEnto Yn; see Figure7
VCC = 1.2 V - 60 - - - ns
VCC = 2.0 V - 20 27 - 34 ns
VCC = 2.7 V - 15 20 - 25 ns
VCC = 3.0 V to 3.6 V; CL =15pF [3] -10 - - - ns
VCC = 3.0 V to 3.6 V [3] - 11 16 - 20 ns
VCC = 4.5 V to 5.5 V - - 13 - 16 ns
NXP Semiconductors 74L V139
Dual 2-to-4 line decoder/demultiplexer
[1] All typical values are measured at Tamb =25°C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3V).
[4] CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2×fo) where: = input frequency in MHz, fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in V= number of inputs switching
Σ(CL× VCC2×fo)= sum of the outputs.
11. Waveforms
CPD power dissipation
capacitance=50 pF; fi = 1 MHz;= GNDto VCC
[4] -42 - - - pF
Table 7. Dynamic characteristics …continued
GND = 0 V; For test circuit see Figure8.
Table 8. Measurement points
< 2.7 V 0.5VCC 0.5VCC
2.7 V to 3.6V 1.5 V 1.5 V
≥ 4.5 V 0.5VCC 0.5VCC
NXP Semiconductors 74L V139
Dual 2-to-4 line decoder/demultiplexer
Table 9. Test data
< 2.7 V VCC ≤ 2.5 ns
2.7 V to 3.6V 2.7 V ≤ 2.5 ns
≥ 4.5 V VCC ≤ 2.5 ns

Partno	Mfg	Dc	Qty	Available	Descript
74LV139PW		N/a	20000	avai	Dual 2-to-4 line decoder/demultiplexer