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74LS154NSCN/a3000avai4-Line to 16-Line Decoder/Demultiplexer
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74LS154 ,4-Line to 16-Line Decoder/DemultiplexerFeaturesYDecodes 4 binary-coded inputs into one of 16 mutuallyEach of these 4-line-to-16-line decod ..
74LS155 ,Dual 2-Line to 4-Line Decoders/DemultiplexersSN54/74LS155DUAL 1-OF-4 DECODER/SN54/74LS156DEMULTIPLEXERThe SN54/74LS155 and SN54/74LS156 are high ..
74LS156 ,Dual 2-Line to 4-Line Decoders/DemultiplexersFeaturesThese TTL circuits feature dual 1-line-to-4-line demultiplex-
74LS160 ,Synchronous Decade Counters(direct clear)SN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
74LS161 ,Synchronous 4-Bit Binary CountersGeneral Descriptioncounters for n-bit synchronous
74LS161 ,Synchronous 4-Bit Binary CountersSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
78L06ACD , The Linear ICs Three-Terminal Low Current Positive Voltage Regulators
78L08AC , The Linear ICs Three-Terminal Low Current Positive Voltage Regulators
78L08AC , The Linear ICs Three-Terminal Low Current Positive Voltage Regulators
78L10A , 3-Terminal Regulators
78L10A , 3-Terminal Regulators
78L15A , 3-Terminal Regulators


74LS154-DM54LS154J-DM74LS154N
4-Line to 16-Line Decoder/Demultiplexer
TL/F/6394
DM54LS154/DM74LS154
4-Line
16-Line
Decoders/Demultiplexers
May 1989
DM54LS154/DM74LS154 4-Line to 16-Line
Decoders/Demultiplexers
General Description
Eachof these 4-line-to-16-line decoders utilizes TTL circuit-to decode four binary-coded inputsinto oneof sixteen
mutually exclusive outputs when boththe strobe inputs,G1
andG2,are low. The demultiplexing functionis performed usingthe4 inputlinesto addressthe output line, passing
data from oneofthe strobe inputs withthe other strobe
input low. When either strobe inputis high,all outputsare
high. These demultiplexersare ideally suitedfor implement-
ing high-performance memory decoders.All inputsare buff-
ered and input clamping diodesare providedto minimize
transmission-line effects and thereby simplify systemde-
sign.
Features Decodes4 binary-coded inputsinto oneof16 mutually
exclusive outputs Performsthe demultiplexing functionby distributing data
fromone inputlinetoanyoneof16 outputs Input clamping diodes simplify system design High fan-out, low-impedance, totem-pole outputs Typical propagation delay levelsof logic23ns
Strobe19ns Typical power dissipation45 mW
Connection and Logic Diagrams
Dual-In-Line Package
TL/F/6394–1
OrderNumber DM54LS154J,
DM74LS154WMorDM74LS154N
See NSPackageNumber J24A, M24Bor N24A
TL/F/6394–2
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
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