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74LCXH162373FAIRCHILDN/a130avaiLow Voltage 16-Bit Transparent Latch with Bushold and 26-Ohm Series Resistor Outputs


74LCXH162373 ,Low Voltage 16-Bit Transparent Latch with Bushold and 26-Ohm Series Resistor Outputsapplications with capability of interfacing to a 5VCC

74LCXH162373
Low Voltage 16-Bit Transparent Latch with Bushold and 26-Ohm Series Resistor Outputs
74LCXH162373 Low Voltage 16-Bit Transparent Latch with Bushold and 26Ω Series Resistor Outputs February 2001 Revised March 2002 74LCXH162373 Low Voltage 16-Bit Transparent Latch with Bushold and 26Ω Series Resistor Outputs General Description Features The LCXH162373 contains sixteen non-inverting latches5V tolerant control inputs and outputs with 3-STATE outputs and is intended for bus oriented2.3V–3.6V V specifications provided CC applications. The device is byte controlled. The flip-flops Equivalent 26Ω series resistors on outputs appear transparent to the data when the Latch Enable (LE) Bushold on inputs eliminates the need for external is HIGH. When LE is LOW, the data that meets the setup pull-up/pull-down resistors time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in6.2 ns t max (V = 3.3V), 20 μA I max PD CC CC a high impedance state. Power down high impedance inputs and outputs The LCXH162373 is designed for low voltage (2.5V or ±12 mA output drive (V = 3.0V) CC 3.3V) V applications with capability of interfacing to a 5V CC Implements patented noise/EMI reduction circuitry signal environment. The 26Ω series resistor helps reduce output overshoot and undershoot.Latch-up performance exceeds 500 mA The LCXH162373 is fabricated with an advanced CMOSESD performance: technology to achieve high speed operation while maintain- Human body model > 2000V ing CMOS low power dissipation. Machine model > 200V The LCXH162373 data inputs include active bushold cir- Also packaged in plastic Fine-Pitch Ball Grid Array cuitry, eliminating the need for external pull-up resistors to (FBGA) (Preliminary) hold unused or floating data inputs at a valid logic level. Ordering Code: Package Order Number Package Description Number 74LCXH162373GX BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1) (Preliminary) [TAPE and REEL] 74LCXH162373MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide [RAIL] 74LCXH162373MEX MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide [TAPE and REEL] 74LCXH162373MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [RAIL] 74LCXH162373MTX MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide [TAPE and REEL] Note 1: BGA package available in Tape and Reel only. Logic Symbol © 2002 DS500445
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