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74LCX06FSCN/a45avaiLow Voltage Hex Inverter/Buffer with Open Drain Outputs


74LCX06 ,Low Voltage Hex Inverter/Buffer with Open Drain OutputsFeaturesThe LCX06 contains six inverters/buffers. The inputs toler-

74LCX06
Low Voltage Hex Inverter/Buffer with Open Drain Outputs
74LCX06 Low Voltage Hex Inverter/Buffer with Open Drain Outputs October 1999 Revised April 2002 74LCX06 Low Voltage Hex Inverter/Buffer with Open Drain Outputs General Description Features The LCX06 contains six inverters/buffers. The inputs toler-5V tolerant inputs ate voltages up to 7V allowing the interface of 5V systems2.3V–3.6V V specifications provided CC to 3V systems. 3.7 ns t max (V = 3.3V), 10 μA I max PD CC CC The outputs of the LCX06 are open drain and can be con- Power down high impedance inputs and outputs nected to other open drain outputs to implement active LOW wire AND or active HIGH wire OR functions.24 mA output drive (V = 3.0V) CC The 74LCX06 is fabricated with advanced CMOS technol-Implements patented noise/EMI reduction circuitry ogy to achieve high speed operation while maintaining Latch-up performance exceeds 500 mA CMOS low power dissipation. Functionally compatible with 74 series 05 ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Order Number Package Number Package Description 74LCX06M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX06SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX06MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description A Inputs n O Outputs n © 2002 DS500237
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