| Partno |
Mfg |
Dc |
Qty |
Available | Descript |
| 74HCT112E |
HAR |
N/a |
575 |
 |
|
74HCT112N ,74HC112;74HCT112; dual JK flip-flop with set and reset; negative-edge triggerGENERAL DESCRIPTIONset-up time prior to the HIGH-to-LOW clock transition forThe 74HC/HCT112 are hig ..
74HCT11D ,74HC/HCT11; Triple 3-input AND gateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT11DB ,74HC/HCT11; Triple 3-input AND gatePin configuration (T)SSOP145.2 Pin description Table 2. Pin description Symbol Pin Description1A, 2 ..
74HCT11N ,Triple 3-input AND gatePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nC ..
74HCT11N ,Triple 3-input AND gatePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nC ..
74VHC00SJ ,Quad 2-Input NAND GateFeaturesThe VHC00 is an advanced high-speed CMOS 2-Input
