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74HC10N-74HCT10DB-74HCT10N
74HC/HCT10; Triple 3-input NAND gate

Philips Semiconductors Product specification
Triple 3-input NAND gate 74HC/HCT10
FEATURES
Output capability: standard ICC category: SSI
GENERAL DESCRIPTION

The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT10 provide the 3-input NAND function.
QUICK REFERENCE DATA

GND= 0 V; Tamb =25 °C; tr =tf= 6 ns
Notes
CPD is used to determine the dynamic power dissipation (PD in μW): =CPD× VCC2× fi + ∑ (CL× VCC2× fO) where:= input frequency in MHz= output frequency in MHz= output load capacitance in pF
VCC= supply voltage in V (CL× VCC2×fo)= sum of outputs For HC the condition is VI= GND to VCC
For HCT the condition is VI= GND to VCC− 1.5 V.
ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.
Philips Semiconductors Product specification
Triple 3-input NAND gate 74HC/HCT10
PIN DESCRIPTION
FUNCTION TABLE
Notes
H= HIGH voltage level
Philips Semiconductors Product specification
Triple 3-input NAND gate 74HC/HCT10
DC CHARACTERISTICS FOR 74HC

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: SSI
AC CHARACTERISTICS FOR 74HC

GND= 0 V; tr =tf= 6 ns; CL= 50 pF
Philips Semiconductors Product specification
Triple 3-input NAND gate 74HC/HCT10
DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: SSI
Note to HCT types

The value of additional quiescent supply current (ΔICC) for a unit load of 1 is given in the family specifications.
To determine ΔICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT

GND= 0 V; tr =tf= 6 ns; CL= 50 pF
AC WAVEFORMS
PACKAGE OUTLINES
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