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74HC7540NNXP Pb-freeN/a468avaiOctal Schmitt trigger buffer/line driver; 3-state; inverting


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74HC7540N
Octal Schmitt trigger buffer/line driver; 3-state; inverting
1. General description
The 74HC7540; 74HCT7540 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7A.
The 74HC7540; 74HCT7540 provides eight inverting buffer/line drivers with 3-state
outputs and Schmitt-trigger action. The 3-state outputs are controlled by the output enable
inputs OE1 and OE2. A HIGH on OEn causes the outputs to assume a high-impedance
OFF-state. Schmitt trigger action on the data inputs transforms slowly changing input
signals into sharply defined, jitter-free output signals.
The 74HC7540; 74HCT7540 is identical to the 74HC540; 74HCT540 but has hysteresis
on the data inputs.
2. Features and benefits
Inverting outputs Low-power dissipation ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Specified from 40 C to +85 C and from 40 C to +125C
3. Ordering information

74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Rev. 4 — 31 December 2012 Product data sheet
Table 1. Ordering information

74HC7540N 40 Cto +125C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HCT7540N
74HC7540D 40 C to +125 C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74HCT7540D
74HC7540DB 40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
4. Functional diagram

5. Pinning information
5.1 Pinning
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
5.2 Pin description

6. Functional description

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP20 packages: above 70 C the value of Ptot derates linearly with 12 mW/K.
For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
Table 2. Pin description

OE1 1 output enable input (active LOW)
A0 to A7 2, 3, 4, 5, 6, 7, 8, 9 data input
GND 10 ground (0V)
Y0 to Y7 18, 17, 16, 15, 14, 13, 12, 11 data output
OE2 19 output enable input (active LOW)
VCC 20 supply voltage
Table 3. Functional table[1]
L H H L X Z X Z
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI >VCC +0.5 V [1]- 20 mA
IOK output clamping current VO< 0.5 V or VO >VCC +0.5V [1]- 20 mA output current 0.5 V < VO < VCC +0.5V - 35 mA
ICC supply current - 70 mA
IGND ground current 70 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation [2]
DIP20 - 750 mW
SO20, SSOP20 - 500 mW
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
8. Recommended operating conditions

9. Static characteristics

Table 5. Recommended operating conditions

Voltages are referenced to GND (ground = 0V)
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - VCC 0- VCC V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
74HC7540

VOH HIGH-level
output voltage = VT+ or VT
IO = 20 A; VCC = 2.0V 1.9 2.0 - 1.9 - 1.9 - V
IO = 20 A; VCC = 4.5V 4.4 4.5 - 4.4 - 4.4 - V
IO = 20 A; VCC = 6.0V 5.9 6.0 - 5.9 - 5.9 - V
IO = 6.0 mA; VCC = 4.5V 3.98 4.32 - 3.84 - 3.7 - V
IO = 7.8 mA; VCC = 6.0V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage = VT+ or VT
IO = 20 A; VCC = 2.0V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 4.5V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 6.0V - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA; VCC = 4.5V - 0.15 0.26 - 0.33 - 0.4 V
IO = 7.8 mA; VCC = 6.0V - 0.16 0.26 - 0.33 - 0.4 V input leakage
current
VI = VCC or GND; VCC =6.0V - - 0.1 - 1.0 - 1.0 A
IOZ OFF-state
output current
per input pin; VI =VT+ or VT; =VCC or GND;
other inputs at VCC or GND;
VCC =6.0 V; IO =0A 0.5 - 5.0 - 10 A
ICC supply current VI = VCC or GND; IO =0A;
VCC =6.0V - 8.0 - 80 - 160 A input
capacitance
-3.5 - - - - - pF
74HCT7540

VOH HIGH-level
output voltage = VT+ or VT; VCC = 4.5V
IO = 20A 4.4 4.5 - 4.4 - 4.4 - V
IO = 6.0 mA 3.98 4.32 - 3.84 - 3.7 - V
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
10. Dynamic characteristics

VOL LOW-level
output voltage = VT+ or VT; VCC = 4.5V
IO = 20 A; - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA; - 0.15 0.26 - 0.33 - 0.4 V input leakage
current
VI = VCC or GND; VCC =5.5V - - 0.1 - 1.0 - 1.0 A
IOZ OFF-state
output current
per input pin; VI =VT+ or VT; =VCC or GND;
other inputs at VCC or GND;
VCC =5.5 V; IO =0A 0.5 - 5.0 - 10 A
ICC supply current VI =VCCor GND; IO = 0 A;
VCC =5.5V - 8.0 - 80 - 160 A
ICC additional
supply current
per input pin; IO =0A; =VCC  2.1V;
other inputs at VCCor GND;
VCC= 4.5Vto 5.5V
An input - 20 72 - 90 - 98 A
OEn input - 130 468 - 585 - 637 A input
capacitance
-3.5 - - - - - pF
Table 6. Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Table 7. Dynamic characteristics

GND=0 V; CL=50 pF; for test circuit see Figure7.
74HC7540

tpd propagation delay An to Yn; see Figure5 [1]
VCC = 2.0 V - 39 120 150 180 ns
VCC = 4.5 V - 14 24 30 36 ns
VCC = 5.0 V; CL =15pF - 11 - - - ns
VCC = 6.0 V - 11 20 26 31 ns
ten enable time OEnto Yn; see Figure6 [1]
VCC = 2.0 V - 41 150 190 225 ns
VCC = 4.5 V - 15 30 38 45 ns
VCC = 6.0 V - 12 26 33 38 ns
tdis disable time OEnto Yn; see Figure6 [1]
VCC = 2.0 V - 52 150 190 225 ns
VCC = 4.5 V - 19 30 38 45 ns
VCC = 6.0 V - 15 26 33 38 ns
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting

[1] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W): =CPD VCC2fi N+  (CL VCC2 fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;(CL VCC2fo)= sum of outputs. transition time see Figure5 [2]
VCC = 2.0 V - 14 60 75 90 ns
VCC = 4.5 V - 5 12 15 18 ns
VCC = 6.0 V - 4 10 13 15 ns
CPD power dissipation
capacitance
per package; =GNDto VCC
[3] -29 - - - pF
74HCT7540

tpd propagation delay An to Yn; see Figure5 [1]
VCC = 4.5 V - 19 32 40 48 ns
VCC = 5.0 V; CL =15pF - 16 - - - ns
ten enable time OEnto Yn; see Figure6 [1]
VCC = 4.5 V - 19 32 40 48 ns
tdis disable time OEnto Yn; see Figure6 [1]
VCC = 4.5 V - 20 32 40 48 ns transition time VCC = 4.5 V; see Figure5 [2] - 5 12 15 18 ns
CPD power dissipation
capacitance
per package; =GNDto VCC 1.5V
[3] -31 - - - pF
Table 7. Dynamic characteristics

GND=0 V; CL=50 pF; for test circuit see Figure7.
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
11. Waveforms

Table 8. Measurement points

74HC7540 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT7540 1.3 V1.3 V0.1VCC 0.9VCC
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting

Table 9. Test data

74HC7540 VCC 6ns 15pF, 50 pF 1k open GND VCC
74HCT7540 3V 6ns 15 pF, 50 pF 1k open GND VCC
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