Partno |
Mfg |
Dc |
Qty |
Available | Descript |
74HC73MX |
NS|National Semiconductor |
N/a |
47 |
|
|
74HC74 ,74HC74 Data SheetMAXIMUM RATINGSÎÎSymbol Parameter Value UnitThis device contains protectionV DC Supply Voltage (Ref ..
74HC7403D ,4-Bit x 64-word FIFO register; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC74D ,Dual D-type flip-flop with set and reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC74D-T , Dual D-type flip-flop with set and reset; positive-edge trigger
74HC74N ,Dual D-type flip-flop with set and reset; positive-edge triggerPin configuration for DIP14, SO14 and (T)SSOP14 Fig 6.
74SSTUB32868AZRHR ,28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA -40 to 85These devices have limited built-in ESD protection. The leads should be shorted together or the dev ..
74SSTUB32868ZRHR ,28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA -40 to 85These devices have limited built-in ESD protection. The leads should be shorted together or the dev ..
74SSTV16859DGGRG4 ,13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 64-TSSOP 0 to 70logic diagram (positive logic)51RESET48CLK49CLK45VREFOne of 13 channels35D1 16Q1A1DC132RQ1BTo 12 Ot ..